HM-65642 В® 8K x 8 Asynchronous
CMOS Static RAM May 2002 Features Description Full CMOS Design The HM-65642 is a CMOS 8192 x 8-bit Static Random
Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide
standard, which allows easy memory board layouts which
accommodate a variety of industry standard ROM, PROM,
EPROM, EEPROM and RAMs. The HM-65642 is ideally
suited for use in microprocessor based systems. In particular, interfacing with the Intersil 80C86 and 80C88 microprocessors is simplified by the convenient output enable (G)
input. Six Transistor Memory Cell Low Standby Supply Current 100ВµA Low Operating Supply Current . 20mA Fast Address Access Time 150ns Low Data Retention Supply Voltage . 2.0V CMOS/TTL Compatible Inputs/Outputs JEDEC Approved Pinout The HM-65642 is a full CMOS RAM which utilizes an array
of six transistor (6T) memory cells for the most stable and
lowest possible standby supply current over the full military
temperature range. Equal Cycle and Access Times No Clocks or Strobes Required Gated Inputs No Pull-Up or Pull-Down Resistors Required Easy Microprocessor Interfacing Dual Chip Enable Control Ordering Information
TEMPERATURE
RANGE (NOTE 1)
150ns/75ВµA CERDIP -40oC to +85oC -JAN# -55oC to +125oC PACKAGE (NOTE 1)
150ns/150ВµA (NOTE 1)
200ns/250ВµA HM1-65642-9 29205BXA -PKG. NO. -F28.6 -F28.6 NOTE:
1. Access Time/Data Retention Supply Current. Pinout
HM-65642 (CERDIP)
TOP VIEW
NC 1 28 VCC A12 2 27 W A7 3 26 E2 A6 4 25 A8 A5 5 24 A9 A4 6
A3 7
A2 8
A1 9 20 E1 A0 10 19 DQ7 DQ0 11 18 DQ6 DQ1 12 17 DQ5 DQ2 13 16 DQ4 GND 14 15 DQ3 PIN …
