SY89537L
3.3V Precision LVPECL and LVDS
Programmable Multiple Output Bank Clock
Synthesizer and Fanout Buffer General Description
The SY89537L integrated programmable clock
synthesizer and fanout is part of a precision PLLbased clock generation family optimized for enterprise
switch, router, and multiprocessor server applications.
This family is ideal for generating internal system
timing requirements up to 700MHz for multiple ASICs,
FPGAs, and NPUs. These devices integrate the
following blocks into a single monolithic IC: PLL (Phase-Lock-Loop) based synthesizer Fanout buffers Clock generator (dividers) Logic translation (LVPECL, LVDS) Five independently programmable output
banks
This level of integration minimizes additive jitter and
part-to-part skew associated with discrete alternatives,
resulting in superior system-level timing with reduced
board space and power. For applications that require
a zero-delay function, see the SY89538L.
All support documentation can be found on
Micrel’s web site at: www.micrel.com. Applications Enterprise routers, switches, servers and
workstations Parallel processor-based systems Internal system clock generation for ASICs, NPUs,
FPGAs Markets LAN/WAN Enterprise servers Test and measurement Precision EdgeВ® Features Integrated programmable synthesizer with multiple
output dividers, fanout buffers, and clock drivers Direct interface to crystal: 14MHz to 18MHz Input MUX accepts a reference and a crystal
(XTAL) source …
