Datasheet Microchip PL138-48

ManufacturerMicrochip
SeriesPL138-48

The PL138-48 family is a high performance low-cost 1:4 outputs Differential LVPECL fanout buffer

Datasheets

PL138-48 - 2.5V-3.3V Low-Skew 1-4 Differential PECL Fanout Buffer
PDF, 618 Kb, File published: Jun 20, 2016
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Prices

Status

PL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Packaging

PL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
N1234
PackageTSSOPTSSOPTSSOPTSSOP
Pins20202020

Parametrics

Parameters / ModelsPL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
Description2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter2:4 PECL buffer 50fs Typ, 100fs Max Additive Phase Jitter
Input MuxYesYesYesYes
Input TypeLVDS/LVPECL/LVHSTL/SSTL/HCSLLVDS/LVPECL/LVHSTL/SSTL/HCSLLVDS/LVPECL/LVHSTL/SSTL/HCSLLVDS/LVPECL/LVHSTL/SSTL/HCSL
Operating Temperature Range, °C0 to +700 to +70-40 to +85-40 to +85
Output Frequency, Max1111
Output TypeLVPECLLVPECLLVPECLLVPECL
Supply Voltage, V2.5V, 3.3V2.5V, 3.3V2.5V, 3.3V2.5V, 3.3V
Within Device Skew, Max25252525

Eco Plan

PL138-48OCPL138-48OC-RPL138-48OIPL138-48OI-R
RoHSCompliantCompliantCompliantCompliant

Model Line

Manufacturer's Classification

  • Clock and Timing > Clock and Data Distribution > Fanout Buffers