Datasheet Microchip PL130-07SI

PL130-07
High Speed Translator Buffer to LVCMOS
Features General Description LVCMOS Output Selectable Drive Capability
-Drive 15 pF or 30 pF Output Load Single AC-Coupled Input (Min. 100 mV Swing) Accepts LVCMOS or Sine Wave Inputs Input Range from 10 MHz to 200 MHz OE High (PL130-07) or OE Low (PL130-07A)
Enable 2.5V to 3.3V Operation Available in 8-Pin SOIC, 8-Pin TSSOP and 3 mm
x 3 mm 16-Pin QFN The PL130-07 is a low cost, high performance, high
speed, buffer that reproduces any input frequency from
10 MHz to 200 MHz. It provides an LVCMOS output
with 15 pF output load drive capability. Any input signal
with at least 100 mV swing can be used as reference
signal. This chip is ideal for conversion from sine wave
to LVCMOS. Block Diagram
PL130-07 CLK_IN INPUT
AMPLIFIER CLK_OUT OE пѓЈ 2016 Microchip Technology Inc. DS20005598A-page 1 PL130-07
1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings †
Supply Voltage (VDD) .+4.6V
Input Voltage (DC).–0.5V to VDD + 0.5V
Output Voltage (DC) .–0.5V to VDD + 0.5V
HBM ESD Rating.2 kV
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability. DS20005598A-page 2 пѓЈ 2016 Microchip Technology Inc. PL130-07 …