Datasheet Texas Instruments CDCM61004RHBR/2801
| Manufacturer | Texas Instruments |
| Series | CDCM61004 |
| Part Number | CDCM61004RHBR/2801 |
1:4 Ultra Low Jitter Crystal-In Clock Generator 32-VQFN -40 to 85
Datasheets
CDCM61004 Four Output, Integrated VCO, Low-Jitter Clock Generator datasheet
PDF, 1.2 Mb, Revision: H, File published: Jan 13, 2016
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 32 | 32 |
| Package Type | RHB | RHB |
| Industry STD Term | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N |
| Package QTY | 3000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | 61004 | CDCM |
| Width (mm) | 5 | 5 |
| Length (mm) | 5 | 5 |
| Thickness (mm) | .9 | .9 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1 | 1 |
| Mechanical Data | Download | Download |
Parametrics
| Input Level | Crystal,LVCMOS |
| Number of Outputs | 4 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 683.264 MHz |
| Output Frequency(Min) | 43.75 MHz |
| Output Level | LVPECL, LVDS, LVCMOS |
| Package Group | VQFN |
| Package Size: mm2:W x L | 32VQFN: 25 mm2: 5 x 5(VQFN) PKG |
| Programmability | Pin configuration |
| Special Features | 3.3V Vcc/Vdd |
| VCC Core | 3.3 V |
| VCC Out | 3.3 V |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: CDCM6100XEVM
CDCM61004/CDCM61002/CDCM61001 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Fibre Channel and SAN Clock Generation Using the CDCM6100xPDF, 322 Kb, File published: Feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in a Fibre Channel application as a clock distributor and clock synthesizer along with measured jitter performance results. - Using LVCMOS Input to the CDCM6100xPDF, 66 Kb, File published: May 23, 2010
This application report is a general guide for using LVCMOS inputs to the CDCM6100x series of ultra-low jitter clock generators from Texas Instruments. This document explains the basic connectivity of LVCMOS inputs to the CDCM6100x and recommends several methods for using the device that ensure proper operation. - TI Powers Altera's Arria II GX FPGA Development KitPDF, 596 Kb, File published: Sep 29, 2009
- Ethernet Clock Generation Using the CDCM6100xPDF, 454 Kb, File published: Feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in an Ethernet LAN and WAN application as a clock distributor and clock synthesizer along with measured jitter performance results.
Model Line
Series: CDCM61004 (3)
- CDCM61004RHBR CDCM61004RHBR/2801 CDCM61004RHBT
Manufacturer's Classification
- Semiconductors > Clock and Timing > Clock Generators > Low Jitter <1psec RMS
