Datasheet Texas Instruments DM6446AZWTKEDACOM

Manufacturer	Texas Instruments
Series	TMS320DM6446
Part Number	DM6446AZWTKEDACOM

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Design Kits & Evaluation Modules

• JTAG Emulators/ Analyzers: TMDSADP
  Adaptive Clocking JTAG Emulator Adapters
  Lifecycle Status: Active (Recommended for new designs)
  
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• JTAG Emulators/ Analyzers: TMDSEMU200-U
  XDS200 USB Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  
• JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
  XDS560v2 System Trace USB & Ethernet Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  
• JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
  XDS560v2 System Trace USB Debug Probe
  Lifecycle Status: Active (Recommended for new designs)
  

Application Notes

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  Building GStreamer
  PDF, 74 Kb, File published: Jan 11, 2008
  This Application Report has been contributed to the TI DaVinci & OMAP Developer Wiki. To see the most recently updated version or to contribute, visit this topic at http://wiki.davincidsp.com/index.php?title=GStreamerGStreamer is a pipeline-based multimedia framework that allows you to create a variety of media-handling componen
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  Changing the DVEVM Memory Map
  PDF, 1.2 Mb, File published: Sep 26, 2007
  This document describes how to configure Codec Engine-based audio/video applications on the DM6446 (DaVinci) for use in a system that has less than the 256 MB of DDR2 memory that the evaluation board provides. Specifically, we present steps for shrinking memory requirements down to 64 MB, but the principles apply to any amount of DDR2.
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  Measuring Video Quality With the TMS320DM6446 DVSDK
  PDF, 136 Kb, File published: May 8, 2007
  The transmission of video sequences is enabled by compressing the video content with different video encoding algorithms at the source and decoding the stream at the destination. The compression process discards part of the original information and decreases the video quality of the decoded stream.Measuring the video quality is measuring how close the decoded stream is to the original stream.
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  Motion JPEG Demo on TMS320DM6446 (Rev. A)
  PDF, 249 Kb, Revision: A, File published: Sep 11, 2007
  This application report describes how to build a motion JPEG demo running on Texas Instruments DM6446 processor leveraging the JPEG codec combo and XDC tools provided with the DM6446 DVEVM/DVSDK package. The demo is derived from the motion JPEG demo running on the TI DM642 processor. Some tips on how to migrate legacy code from TI DSP only based platform such as DM642 to the new system-on-chip (So
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  TMS320DM6446 594 MHz to 810 MHz Migration Guide
  PDF, 31 Kb, File published: Jul 20, 2010
  This application report is intended to provide an overview of changes necessary to upgrade a DM6446-based design from the 513 MHz or 594 MHz device to an 810 MHz device. The changes listed below are required by the 810 MHz device for proper operation; other system changes may be required to accommodate new speeds or capabilities in the system.
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  TMS320DM644x Thermal Considerations (Rev. A)
  PDF, 202 Kb, Revision: A, File published: Apr 23, 2008
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  DaVinci System Level Benchmarking Measurements
  PDF, 1.8 Mb, File published: Sep 28, 2006
  The DaVinciв„ў platform offers a complete solution for many multimedia applications requiring advanced video codecs. The solution consists of a DM644x dual core architecture that offers high performance along with a rich mix of peripherals and a complete software environment. This environment includes inter-processor communication software via DSP/BIOSв„ў Link, and a codec framework that e
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  Compact Flash (CF) Support on the DVEVM
  PDF, 398 Kb, File published: Jul 25, 2007
  The TMS320DM6446 device has a rich set of peripherals; however, many of these peripherals are multiplexed with each other, and only one is available at a time.Perhaps the best example of a multiplexing scenario found on the TMS320DM6446 device is the asynchronous external memory interface (EMIFA). The pins that make up this interface are multiplexed to service NAND flash, NOR flash, CF, hard
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  Using Static IP Between Linux Host and the DVEVM
  PDF, 709 Kb, File published: Jul 30, 2007
  The typical development environment for the TMS320DM644x EVM devices, also known as the digital video evaluation module (DVEVM), involves connecting a host workstation to the target EVM. This environment allows for the bulk of the development to be done in the more powerful host hardware and transferred quickly (via connection medium) to the target EVM for testing.The most popular target-host
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  Running Demo via ddd on the DVEVM
  PDF, 2.1 Mb, File published: Jul 30, 2007
  The TMS320DM6446 device includes an ARM core which can run the very popular LinuxВ® operating system. One of Linux strengths is its open source approach enabling developers a wide range of development tools from free open source debugger applications such as ddd to sophisticated IDE-based debuggers sold by independent software vendors such as MontaVista'sВ® DevRocketв„ў and Green Hills&r
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  Digital Video Using DaVinci SoC
  PDF, 614 Kb, File published: Jun 27, 2007
  This application report provides a brief video basics overview. The Texas Instruments (TI) TMS320DM6446/DM6443 DaVinciв„ў system-on-chip (SoC) devices are capable of YCbCr or red, green, blue (RGB) digital video output; YCbCr outputs can interface with a video encoder or RGB outputs can interface with LCD parts. This document details these two solutions, and provides software drivers and an ex
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  Host USB Support on the DVEVM
  PDF, 720 Kb, File published: Jul 20, 2007
  The TMS320DM6446 device can be configured as a universal serial bus (USB) host or slave device. When configured as a host, it can support USB mass storage devices such as USB flash drives which are widely used today to transfer pictures, music, and documents between PCs, laptops, and portable devices; however, this support is not enabled by default. This document outlines the necessary steps for e
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  De-Interlacing and YUV 4:2:2 to 4:2:0 Conversion on DM6446 Using the Resizer (Rev. B)
  PDF, 186 Kb, Revision: B, File published: Dec 17, 2008
  Video signals captured directly from charge-coupled device (CCD) cameras naturally have interlaced effects and are in a 4:2:2 interleaved format. They typically need to be converted to a 4:2:0 planar format before being encoded because most video compression standards accept input only in 4:2:0 format. It is better to reduce or remove the interlaced artifacts in the original video signal when fe
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  Creating a TMS320DM6446 Audio Encode Example Using XDC Tools (Rev. A)
  PDF, 130 Kb, Revision: A, File published: Feb 26, 2008
  This application report describes how to create an eXpressDSPв„ў Algorithm for Digital Media (XDM) compatible audio encode example on the TMS320DM6446 processor using the eXpressDSP Components (XDC) tool. XDM is an extension of TI eXpress DSP Algorithm Interface Standard (xDAIS).The example consists of:The LinuxВ® application code running on the ARM side of DM6446The d
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  EncodeDecode Demo for the DaVinci DVEVM/DVSDK 1.2 (Rev. A)
  PDF, 282 Kb, Revision: A, File published: Jun 27, 2007
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  Basic Application Loading over the Serial Interface for the DaVinci TMS320DM644x
  PDF, 219 Kb, File published: Dec 21, 2006
  This application report describes two related pieces of software that are used together to download an application over the DM644x UART0 serial interface and run it out of the ARM internal memory. The discussion begins with a description of a host application that executes on a user’s PC, and includes a description of how to interface to the ROM boot loader of the DM644x device. The discussion of
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  Implementing the DDR2 PCB Layout on the TMS320DM644x DMSoC (Rev. G)
  PDF, 154 Kb, Revision: G, File published: Jun 16, 2008
  This application report contains implementation instructions for the DDR2 interface contained on the TMS320DM644x digital signal processor (DSP) device. The approach to specifying interface timing for the DDR2 interface is quite different than on previous devices.The previous approach specified device timing in terms of data sheet specifications and simulation models. The system designer was
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  EDMA v3.0 (EDMA3) Migration Guide for TMS320DM644x DMSoC
  PDF, 243 Kb, File published: Dec 3, 2005
  This Document describes migrating from the Texas Instruments TMS320C64x digital signal processor (DSP) enhanced direct memory access (EDMA2) to the TMS320DM644x Digital Media System-on-Chip (DMSoC) EDMA3. This document summarizes the key differences between the EDMA3 and the EDMA2 and provides guidance for migrating from EDMA2 to EDMA3.
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  Booting DaVinci EVM from NAND Flash (Rev. A)
  PDF, 3.4 Mb, Revision: A, File published: Dec 15, 2008
  Currently, the DaVinciв„ў evaluation module (DVEVM) supports three boot modes: the DVEVM can boot from NOR (default), NAND, or universal asynchronous receiver/transmitter (UART). NOR Flash offers the advantages of one-byte random access and execute-in-place technology. NAND Flash is not as easy to work with since it requires Flash Translation Layer (FTL) software to make it accessible; however
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  TMS320DM6446/3 Power Consumption Summary (Rev. B)
  PDF, 66 Kb, Revision: B, File published: Aug 16, 2010
  This document discusses the power consumption of the Texas Instruments TMS320DM6446 and TMS320DM6443 digital media System-on-Chip (DMSoC). Power consumption on the DM6446/3 devices is highly application-dependent, so spreadsheets are provided to model power consumption for a user's application. To get good results from the spreadsheet, realistic usage parameters must be entered. The low-core volta
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  Encode Demo for the DaVinci DVEVM/DVSDK 1.2 (Rev. A)
  PDF, 323 Kb, Revision: A, File published: Jun 27, 2007
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  TMS320DM6441 Power Consumption Summary Application Report
  PDF, 101 Kb, File published: Apr 8, 2008
  This document discusses the power consumption of the Texas Instruments TMS320DM6441 digital media System-on-Chip (DMSoC). Power consumption on the DM6441 device is highly application-dependent, so a spreadsheet is provided to model power consumption for a user’s application. To get good results from the spreadsheet, realistic usage parameters must be entered. The low-core voltage and other power d
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  Booting and Flashing via the DaVinci TMS320DM644x Serial Interface (Rev. A)
  PDF, 159 Kb, Revision: A, File published: Sep 10, 2009
  This application report describes two related pieces of software that are used together to boot the ARM core of the DM644x via the universal asynchronous receiver/transmitter (UART0) serial interface. Additionally, this software allows you to write the needed files to a NAND or NOR flash device, connected to the DM644x AEMIF, such that the ARM core can boot from these external memories. The softwa
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  TMS320DM644x ROM Migration Guide
  PDF, 47 Kb, File published: Jul 20, 2010
  This application report describes ROM bootloader (RBL) differences between silicon revision 2.1 and 2.3 of the TMS320DM644x Digital Media System-on-Chip (DMSoC).
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  Decode Demo for the DaVinci DVEVM/DVSDK 1.2 (Rev. A)
  PDF, 335 Kb, Revision: A, File published: Jun 27, 2007
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  Fast Development with DaVinci On Screen Display (OSD)
  PDF, 414 Kb, File published: Jul 6, 2006
  While On Screen Display (OSD) functionality became prevalent as a cheaper alternative to using buttons/knobs to control television settings, in today's society, it seems like everyday a new gadget comes out which uses OSDs.Imagine a video phone or set-top application for a minute; both of these applications require video overlaid with some graphics OSD, and may require some blending between v
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  TMS320DM6446 to TMS320DM6437 Migration Guide
  PDF, 246 Kb, File published: Nov 5, 2007
  This application report describes device considerations for migrating a design based on a TI TMS320DM6446 Digital Media System-on-Chip (SoC) to one based on a TI TMS320DM6437 Digital Media Processor (DMP). These two devices have many similarities; they both contain the TMS320C64x+в„ў DSP CPU core, feature video frontand back-end processing capability, and a similar mixture of memory and other periph
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  TMS320DM6446 to TMS320DM6467 Migration
  PDF, 311 Kb, File published: Nov 17, 2008
  This document describes considerations for migration from Texas Instruments TMS320DM6446 Digital Media System-on-Chip (DMSoC) to the TMS320DM6467 DMSoC. Both devices feature a dual-core architecture utilizing a high-performance TMS20C64x+в„ў Digital Signal Processor (DSP) core and an ARM926EJ-S central processing unit (CPU) core. While the TMS320DM6446 features video front-end and back-end pro
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  Ultrasound Scan Conversion on TI's C64x+ DSPs
  PDF, 656 Kb, File published: Apr 3, 2009
  One of the recent significant developments in ultrasound is the emergence of portable and handheld ultrasound machines and their rapid acceptance in the market place.Because of their power efficiency and high performance digital signal processor (DSP) based devices have been increasingly used as the main processing engine in these portable and hand carried units.

  This application report dis

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  USB Compliance Checklist (Rev. A)
  PDF, 72 Kb, Revision: A, File published: Mar 10, 2010
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  DaVinci Technology Background and Specifications (Rev. A)
  PDF, 108 Kb, Revision: A, File published: Jan 4, 2007
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  Understanding the Davinci Resizer (Rev. B)
  PDF, 469 Kb, Revision: B, File published: Jul 17, 2008
  The image-scaling operation is one of the most commonly used video and imaging processing functions. The resizer hardware module in the DaVinciв„ў video processing subsystem (VPSS) provides the scaling capability in hardware, therefore off-loading the system for other processing tasks. To achieve good video quality while maintaining good overall system performance, a better understanding of th
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  Understanding the Davinci Preview Engine (Rev. A)
  PDF, 209 Kb, Revision: A, File published: Jul 23, 2008
  The Preview Engine block in the DaVinci video processing sub-system (VPSS) provides some critical functions for image and video processing. These functions, if implemented in software, require a significant number of computations in terms of million instructions per second (MIPs). By offloading these functions, the valuable MIPs can be used for more differentiating tasks, such as video compression
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  Building a Small Embedded Linux Kernel Example (Rev. A)
  PDF, 1.3 Mb, Revision: A, File published: May 27, 2008
  Building a Small Embedded Linux Kernel Example Application Report
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  5 VIN solution using DCDC Controllers, a LDO, and a Digitally Prog. Sequencer
  PDF, 179 Kb, File published: Nov 24, 2008
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  LSP 2.10 DaVinci Linux Drivers (Rev. A)
  PDF, 1.2 Mb, Revision: A, File published: Jul 8, 2009
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  Running a TMS320C64x+ Codec Across TMS320C64x+ Based DSP Platforms
  PDF, 969 Kb, File published: Sep 24, 2009
  This application report describes the device differences to be taken care for running the C64x+™ video codec software on different C64x+ based platforms. This document assumes that the codec software is developed for the C64x+ digital signal processor (DSP) core. As many TI platforms have a C64x+ DSP this document gives the details for running the standalone codec software on a C64x+ platfo
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  EDMA v2.0 to EDMA v3.0 (EDMA3) Migration Guide (Rev. A)
  PDF, 292 Kb, Revision: A, File published: Aug 21, 2008
  This application report summarizes the key differences between the enhanced direct memory access (EDMA3) used on C64x+в„ў DSP devices and the EDMA2 used on TMS320C64xв„ў DSP devices, and provides guidance for migrating from EDMA2 to EDMA3.
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  TMS320C64x to TMS320C64x+ CPU Migration Guide (Rev. A)
  PDF, 310 Kb, Revision: A, File published: Oct 20, 2005
  This document describes migration from the Texas Instruments TMS320C64xв„ў digital signal processor (DSP) to the TMS320C64x+в„ў DSP. The objective of this document is to indicate differences between the two cores and to briefly describe new features. Functionality in the devices that is identical is not included. For detailed information about either device, see the TMS320C64x/C64x+ DSP
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  Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)
  PDF, 93 Kb, Revision: A, File published: Jul 17, 2008
  This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa
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  Common Object File Format (COFF)
  PDF, 125 Kb, File published: Apr 15, 2009
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  High-Speed Interface Layout Guidelines (Rev. G)
  PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
  As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
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  Introduction to TMS320C6000 DSP Optimization
  PDF, 535 Kb, File published: Oct 6, 2011
  The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then

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Manufacturer's Classification

• Semiconductors > Processors > Digital Signal Processors > Media Processors > Digital Video Processors