Datasheet Diodes PI6CG33401CZHIEX

Pb A product Line of
Diodes Incorporated Lead-free Green PI6CG33401
3.3V Very-Low-Power 4-Output PCIe Clock Generator With On-Chip Termination Features Description ÎÎ3.3V Supply Voltage The PI6CG33401 is a 4-output very-low-power PCIe Gen1/Gen2/
Gen3/Gen4/Gen 5 clock generator. It uses 25MHz crystal or CMOS
reference as an input to generate the 100MHz low-power differential HCSL outputs with on-chip terminations. The on-chip termination can save 16 external resistors and make layout easier.
An additional buffered reference output is provided to serve as a
low-noise reference for other circuitry. ÎÎCrystal/CMOS Input: 25MHz
ÎÎFour Differential Low Power HCSL Outputs with On-Chip Termination ÎÎDefault ZOUT = 100Ω
ÎÎIndividual Output Enable
ÎÎReference CMOS Output
ÎÎProgrammable Slew Rate and Output Amplitude for Each It uses Diodes' proprietary PLL design to achieve very-low
jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. It also provides various options such as different slew rate
and amplitude through SMBUS, so users can configure the device easily to get the optimized performance for their individual
boards. The device also supports selectable spread-spectrum
options to reduce EMI for various applications. Output ÎÎDifferential Outputs Blocked until PLL is Locked
ÎÎSelectable 0%, -0.25%, or -0.5% Spread on Differential Outputs ÎÎStrapping pins or SMBus for Configuration
ÎÎDifferential Output-To-Output Skew …

Pb
Lead-free Green A product Line of
Diodes Incorporated PI6CG33401C
3.3V Very-Low-Power 4-Output PCIe Clock Generator With On-Chip Termination Features Description ÎÎ3.3V Supply Voltage The PI6CG33401C is a 4-output very-low-power PCIe Gen1/Gen2/
Gen3/Gen4/Gen 5 clock generator. It uses 25MHz crystal or CMOS
reference as an input to generate the 100MHz low-power differential HCSL outputs with on-chip terminations. The on-chip termination can save 16 external resistors and make layout easier.
An additional buffered reference output is provided to serve as a
low-noise reference for other circuitry. ÎÎCrystal/CMOS Input: 25MHz
ÎÎFour Differential Low Power HCSL Outputs with On-Chip Termination ÎÎDefault ZOUT = 100Ω
ÎÎIndividual Output Enable
ÎÎReference CMOS Output
ÎÎProgrammable Output Slew Rate and Output Amplitude for Each It uses Diodes' proprietary PLL design to achieve very-low
jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. It also provides various options such as different slew rate
and amplitude through SMBUS, so users can configure the device easily to get the optimized performance for their individual
boards. The device also supports selectable spread-spectrum
options to reduce EMI for various applications. ÎÎDifferential Outputs Blocked until PLL is Locked
ÎÎSelectable 0%, -0.25%, or -0.5% Spread on Differential Outputs
ÎÎStrapping pins or SMBus for Configuration
ÎÎDifferential Output-To-Output Skew …