Datasheet Microchip ATSAMA5D35A-CN

SAMA5D3 Series
Low-Power Arm® Cortex®-A5 Processor-Based MPU,
536 MHz, FPU, Gigabit Ethernet with IEEE®1588 plus
10/100 Ethernet, Dual CAN, AES, SHA
Description
The Microchip SAMA5D3 series is a high-performance, power-efficient embedded MPU based on the Arm CortexA5 processor, achieving 536 MHz with power consumption levels below 0.5 mW in low-power mode. The device features a floating point unit for high-precision computing and accelerated data processing, and a high data bandwidth
architecture. It integrates advanced user interface and connectivity peripherals and security features.
The SAMA5D3 series features an internal multi-layer bus architecture associated with 39 DMA channels to sustain the
high bandwidth required by the processor and the high-speed peripherals. The device offers support for DDR2/LPDDR/
LPDDR2 and MLC NAND Flash memory with 24-bit ECC.
The comprehensive peripheral set includes an LCD controller with overlays for hardware-accelerated image composition, a touchscreen interface and a CMOS sensor interface. Connectivity peripherals include Gigabit EMAC with
IEEE1588, 10/100 EMAC, multiple CAN, UART, SPI and I2C. With its secure boot mechanism, hardware accelerated
engines for encryption (AES, TDES) and hash function (SHA), the SAMA5D3 ensures anti-cloning, code protection and
secure external data transfers.
The SAMA5D3 series is optimized for control panel/HMI applications and applications that require high levels of connectivity in the industrial and consumer markets. Its low-power consumption levels make the SAMA5D3 particularly
suited for battery-powered devices.
There are five SAMA5D3 devices in this series. The table SAMA5D3 Device Differences on page 3 shows the differences in the embedded features. All other features are available on all derivatives; this includes the three USB ports as
well as the encryption engine and secure boot features.  2020 Microchip Technology Inc. DS60001609B-page 1 SAMA5D3 SERIES
Features
• Core
-Arm Cortex-A5 Processor with ARMv7-A Thumb-2 Instruction Set
-CPU Frequency up to 536 MHz
-32 Kbyte Data Cache, 32 Kbyte Instruction Cache, Virtual Memory System Architecture (VMSA) …