LSI/CSI
UL LS7083N
LS7084N ® LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405 A3800 June 2015 QUADRATURE CLOCK CONVERTER VDD (Pin 2)
Supply Voltage positive terminal.
VSS (Pin 3)
Supply Voltage negative terminal.
A (Pin 4)
Quadrature Clock Input A. This input has a filter circuit to validate
input logic level and eliminate encoder dither.
B (Pin 5)
Quadrature Clock Input B. This input has a filter circuit identical
to input A.
Mode (Pin 6)
Mode is a 3-state input to select resolutions x1, x2 or x4. The selected resolution multiplies the input quadrature clock rate by 1, 2
and 4, respectively, in producing the outputs UPCK / DNCK and
CLK (see Figure 2).
The Mode input logic levels selects resolutions as follows:
Logic 0 = x1 Float = x2 Logic 1 = x4 7083N/84N-062315 -1 V DD (+V ) 2 V SS (-V ) 3 A 4 RBIAS 1 V DD (+V ) 2 V SS (-V ) 3 A 4 LS7084N INPUT/OUTPUT DESCRIPTION:
RBIAS (Pin 1)
Input for external component connection. A resistor connected
between this input and VSS adjusts the output clock pulse width
(Tow). For proper operation, the output clock pulse width must be
less than or equal to the A, B pulse separation (TOW ≤ TPS). 1 LSI DESCRIPTION: …
