Datasheet MCP6401, MCP6401R, MCP6401U, MCP6402, MCP6404, MCP6406, MCP6407, MCP6409 (Microchip) - 5
| Manufacturer | Microchip |
| Description | The Microchip Technology MCP6401/1R/1U family of operational amplifiers (op amps) has low quiescent current (45 µA, typical) and rail-to-rail input and output operation |
| Pages / Page | 44 / 5 — MCP6401/1R/1U/2/4/6/7/9. DC ELECTRICAL SPECIFICATIONS (CONTINUED). … |
| File Format / Size | PDF / 2.1 Mb |
| Document Language | English |
MCP6401/1R/1U/2/4/6/7/9. DC ELECTRICAL SPECIFICATIONS (CONTINUED). Electrical Characteristics. Parts. Parameters. Sym. Min. Typ. Max
Model Line for this Datasheet
- MCP6402-E/SN MCP6402-H/SN MCP6402-H/SNVAO MCP6402T-E/MNY MCP6402T-E/SN MCP6402T-H/SN MCP6402T-H/SNVAO
Text Version of Document
link to page 5 link to page 5 link to page 8
MCP6401/1R/1U/2/4/6/7/9 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics
: Unless otherwise indicated, TA = +25°C, VDD = +1.8v to +6.0v, VSS = GND, V ≈ CM = VDD/2, VOUT VDD/2, VL = VDDD/2 and RL = 100 kΩ to VL (Refer to Figure 1-1).
Parts Parameters Sym Min Typ Max Units Temp Conditions (Note 1)
Output Short-Circuit ISC — ±5 — mA E, H VDD = 1.8V Current — ±15 — mA E, H VDD = 6.0V
Power Supply
Supply Voltage VDD 1.8 — 6.0 V E, H Quiescent Current IQ 20 45 70 µA E, H IO = 0, VDD = 5.0V per Amplifier V — 55 — µA +125°C E CM = 0.2VDD — 60 — µA +150°C H
Note 1:
E part stands for the one whose operating temperature range is from -40°C to +125°C and H part stands for the one whose operating temperature range is from -40°C to +150°C.
2:
Figure 2-14 shows how VCMR changes across temperature.
AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2, V ≈ OUT VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Parts Conditions AC Response
Gain Bandwidth Product GBWP — 1 — MHz E, H Phase Margin PM — 65 — ° E, H G = +1 V/V Slew Rate SR — 0.5 — V/µs E, H
Noise
Input Noise Voltage Eni — 3.6 — µVp-p E, H f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 28 — nV/√Hz E, H f = 1 kHz Input Noise Current Density ini — 0.6 — fA/√Hz E, H f = 1 kHz
TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters Sym Min Typ Max Units Conditions Temperature Ranges
Operating Temperature Range TA -40 — +125 °C E temp parts (
Note 1
) TA -40 — +150 °C H temp parts (
Note 1
) Storage Temperature Range TA -65 — +155 °C
Thermal Package Resistances
Thermal Resistance, 5L-SC70 θJA — 331 — °C/W Thermal Resistance, 5L-SOT-23 θJA — 220.7 — °C/W Thermal Resistance, 8L-SOIC θJA — 149.5 — °C/W Thermal Resistance, 8L-2x3 TDFN θJA — 52.5 — °C/W Thermal Resistance, 14L-SOIC θJA — 95.3 — °C/W Thermal Resistance, 14L-TSSOP θJA — 100 — °C/W
Note 1:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +155°C. © 2009-2011 Microchip Technology Inc. DS22229D-page 5 Document Outline MCP6401/1R/1U/2/4/6/7/9 Features Applications Design Aids Typical Application Description E Temp Package Types H Temp Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 MCP6401/1R/1U/2/4 Electrical Specifications 2: Figure 2-14 shows how VCMR changes across temperature. 1.3 MCP6406/7/9 Electrical Specifications 2: Figure 2-14 shows how VCMR changes across temperature. 1.4 Test Circuits EQUATION 1-1: FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage. FIGURE 2-3: Input Offset Voltage. FIGURE 2-4: Input Offset Voltage Drift. FIGURE 2-5: Input Offset Voltage Drift. FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 6.0V. FIGURE 2-7: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. FIGURE 2-8: Input Offset Voltage vs. Output Voltage. FIGURE 2-9: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-10: Input Noise Voltage Density vs. Frequency. FIGURE 2-11: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-12: CMRR, PSRR vs. Frequency. FIGURE 2-13: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-14: Common Mode Input Voltage Range Limits vs. Ambient Temperature. FIGURE 2-15: Input Bias, Offset Current vs. Ambient Temperature. FIGURE 2-16: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-17: Quiescent Current vs. Ambient Temperature. FIGURE 2-18: Quiescent Current vs. Power Supply Voltage. FIGURE 2-19: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-20: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-21: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-23: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-24: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-25: Output Voltage Swing vs. Frequency. FIGURE 2-26: Output Voltage Headroom vs. Output Current. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Slew Rate vs. Ambient Temperature. FIGURE 2-29: Small Signal Non-Inverting Pulse Response. FIGURE 2-30: Small Signal Inverting Pulse Response. FIGURE 2-31: Large Signal Non-Inverting Pulse Response. FIGURE 2-32: Large Signal Inverting Pulse Response. FIGURE 2-33: The MCP6401/1R/1U/2/4/6/7/9 Shows No Phase Reversal. FIGURE 2-34: Closed Loop Output Impedance vs. Frequency. FIGURE 2-35: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-36: Channel-to-Channel Separation vs. Frequency (MCP6402/4/7/9 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 1 3.1 Analog Output (VOUT) 3.2 Analog Inputs (VIN+, VIN-) 3.3 Power Supply Pin (VDD, VSS) 4.0 Application Information 4.1 Rail-to-Rail Input 4.1.1 Phase Reversal 4.1.2 Input Voltage Limits FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.1.3 Input Current Limits FIGURE 4-3: Protecting the Analog Inputs. 4.1.4 Normal Operation 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 1. Non-inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the Common Mode input voltage. 2. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface. 4.7 Application Circuits 4.7.1 Precision Half-Wave Rectifier FIGURE 4-8: Precision Half-Wave Rectifier. 4.7.2 battery Current Sensing FIGURE 4-9: Supply Current Sensing. 4.7.3 Instrumentation Amplifier FIGURE 4-10: Two Op Amp Instrumentation Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Package Marking Information (Continued) Appendix A: REVISION HISTORY Revision D (September 2011) 1. Section 1.0 “Electrical Characteristics”: Updated minor typographical corrections in both “DC Electrical Specifications” tables to show the correct unit for RL (kW instead of kW). Revision C (August 2011) 1. Added new MCP6406, MCP6407 and MCP6409 devices and the related information throughout the document. 2. Created two package type drawings based on the temperature characterization (see E Temp Package Types and H Temp Package Types). 3. Added MCP6406/7/9 specification tables in Section 1.3 “MCP6406/7/9 Electrical Specifications”. 4. Updated characterization graphics in Section 2.0 “Typical Performance Curves”. 5. Updated Table 3-1 in Section 3.0 “Pin Descriptions” to show all the devices. 6. Updated markings examples in Section 6.1 “Package Marking Information”. 7. Updated the package markings information to show all drawings available for each type of package. 8. Updated the Product Identification System page with the new devices and temperature specifications. 1. Added the MCP6402 and MCP6404 package information. 2. Updated the ESD protection value on all pins in Section 1.1 “Absolute Maximum Ratings †”. 3. Added Figure 2-36. 4. Updated Table 3-1. 5. Updated Section 4.1.2 “Input Voltage Limits”. 6. Added Section 4.1.3 “Input Current Limits”. 7. Added Section 4.5 “Unused Op Amps”. 8. Updated Section 5.4 “Analog Demonstration and Evaluation Boards”. 9. Updated the package markings information and drawings. 10. Updated the Product Identification System page. Revision A (December 2009) 1 MHz, 45 µA Op Amps Product Identification System a) MCP6401T-E/LT: Tape and Reel, Extended Temperature, 5LD SC70 pkg b) MCP6401T-E/OT: Tape and Reel, Extended Temperature, 5LD SOT-23 pkg c) MCP6401RT-E/OT: Tape and Reel, 5LD SOT-23 pkg d) MCP6401UT-E/OT: Tape and Reel, Extended Temperature, 5LD SOT-23 pkg e) MCP6402-E/SN: Extended Temperature, 8LD SOIC pkg f) MCP6402T-E/SN: Tape and Reel, Extended Temperature, 8LD SOIC pkg g) MCP6402T-E/MNY: Tape and Reel, Extended Temperature, 8LD 2x3 TDFN pkg h) MCP6404-E/SL: Extended Temperature, 14LD SOIC pkg i) MCP6404T-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC pkg j) MCP6404-E/ST: Extended Temperature, 14LD TSSOP pkg k) MCP6404T-E/ST: Tape and Reel, Extended Temperature, 14LD TSSOP pkg. a) MCP6401T-H/OT: Tape and Reel, High Temperature, 5LD SOT-23 pkg b) MCP6402-H/SN: High Temperature, 8LD SOIC pkg c) MCP6402T-H/SN: Tape and Reel, High Temperature, 8LD SOIC pkg d) MCP6404-H/SL: High Temperature, 14LD SOIC pkg e) MCP6404T-H/SL: Tape and Reel, High Temperature, 14LD SOIC pkg f) MCP6406T-H/OT: Tape and Reel, High Temperature, 5LD SOT-23 pkg g) MCP6407-H/SN: High Temperature, 8LD SOIC pkg h) MCP6407T-H/SN: Tape and Reel, High Temperature, 8LD SOIC pkg i) MCP6409-H/SL: High Temperature, 14LD SOIC pkg j) MCP6409T-H/SL: Tape and Reel, High Temperature, 14LD SOIC pkg Notes: Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Indianapolis Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service Trademarks Worldwide Sales and Service
MCP6401/1R/1U/2/4/6/7/9 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics
: Unless otherwise indicated, TA = +25°C, VDD = +1.8v to +6.0v, VSS = GND, V ≈ CM = VDD/2, VOUT VDD/2, VL = VDDD/2 and RL = 100 kΩ to VL (Refer to Figure 1-1).
Parts Parameters Sym Min Typ Max Units Temp Conditions (Note 1)
Output Short-Circuit ISC — ±5 — mA E, H VDD = 1.8V Current — ±15 — mA E, H VDD = 6.0V
Power Supply
Supply Voltage VDD 1.8 — 6.0 V E, H Quiescent Current IQ 20 45 70 µA E, H IO = 0, VDD = 5.0V per Amplifier V — 55 — µA +125°C E CM = 0.2VDD — 60 — µA +150°C H
Note 1:
E part stands for the one whose operating temperature range is from -40°C to +125°C and H part stands for the one whose operating temperature range is from -40°C to +150°C.
2:
Figure 2-14 shows how VCMR changes across temperature.
AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2, V ≈ OUT VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Parts Conditions AC Response
Gain Bandwidth Product GBWP — 1 — MHz E, H Phase Margin PM — 65 — ° E, H G = +1 V/V Slew Rate SR — 0.5 — V/µs E, H
Noise
Input Noise Voltage Eni — 3.6 — µVp-p E, H f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 28 — nV/√Hz E, H f = 1 kHz Input Noise Current Density ini — 0.6 — fA/√Hz E, H f = 1 kHz
TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters Sym Min Typ Max Units Conditions Temperature Ranges
Operating Temperature Range TA -40 — +125 °C E temp parts (
Note 1
) TA -40 — +150 °C H temp parts (
Note 1
) Storage Temperature Range TA -65 — +155 °C
Thermal Package Resistances
Thermal Resistance, 5L-SC70 θJA — 331 — °C/W Thermal Resistance, 5L-SOT-23 θJA — 220.7 — °C/W Thermal Resistance, 8L-SOIC θJA — 149.5 — °C/W Thermal Resistance, 8L-2x3 TDFN θJA — 52.5 — °C/W Thermal Resistance, 14L-SOIC θJA — 95.3 — °C/W Thermal Resistance, 14L-TSSOP θJA — 100 — °C/W
Note 1:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +155°C. © 2009-2011 Microchip Technology Inc. DS22229D-page 5 Document Outline MCP6401/1R/1U/2/4/6/7/9 Features Applications Design Aids Typical Application Description E Temp Package Types H Temp Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 MCP6401/1R/1U/2/4 Electrical Specifications 2: Figure 2-14 shows how VCMR changes across temperature. 1.3 MCP6406/7/9 Electrical Specifications 2: Figure 2-14 shows how VCMR changes across temperature. 1.4 Test Circuits EQUATION 1-1: FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage. FIGURE 2-3: Input Offset Voltage. FIGURE 2-4: Input Offset Voltage Drift. FIGURE 2-5: Input Offset Voltage Drift. FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 6.0V. FIGURE 2-7: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. FIGURE 2-8: Input Offset Voltage vs. Output Voltage. FIGURE 2-9: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-10: Input Noise Voltage Density vs. Frequency. FIGURE 2-11: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-12: CMRR, PSRR vs. Frequency. FIGURE 2-13: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-14: Common Mode Input Voltage Range Limits vs. Ambient Temperature. FIGURE 2-15: Input Bias, Offset Current vs. Ambient Temperature. FIGURE 2-16: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-17: Quiescent Current vs. Ambient Temperature. FIGURE 2-18: Quiescent Current vs. Power Supply Voltage. FIGURE 2-19: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-20: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-21: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-23: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-24: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-25: Output Voltage Swing vs. Frequency. FIGURE 2-26: Output Voltage Headroom vs. Output Current. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Slew Rate vs. Ambient Temperature. FIGURE 2-29: Small Signal Non-Inverting Pulse Response. FIGURE 2-30: Small Signal Inverting Pulse Response. FIGURE 2-31: Large Signal Non-Inverting Pulse Response. FIGURE 2-32: Large Signal Inverting Pulse Response. FIGURE 2-33: The MCP6401/1R/1U/2/4/6/7/9 Shows No Phase Reversal. FIGURE 2-34: Closed Loop Output Impedance vs. Frequency. FIGURE 2-35: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-36: Channel-to-Channel Separation vs. Frequency (MCP6402/4/7/9 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 1 3.1 Analog Output (VOUT) 3.2 Analog Inputs (VIN+, VIN-) 3.3 Power Supply Pin (VDD, VSS) 4.0 Application Information 4.1 Rail-to-Rail Input 4.1.1 Phase Reversal 4.1.2 Input Voltage Limits FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.1.3 Input Current Limits FIGURE 4-3: Protecting the Analog Inputs. 4.1.4 Normal Operation 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 1. Non-inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the Common Mode input voltage. 2. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface. 4.7 Application Circuits 4.7.1 Precision Half-Wave Rectifier FIGURE 4-8: Precision Half-Wave Rectifier. 4.7.2 battery Current Sensing FIGURE 4-9: Supply Current Sensing. 4.7.3 Instrumentation Amplifier FIGURE 4-10: Two Op Amp Instrumentation Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Package Marking Information (Continued) Appendix A: REVISION HISTORY Revision D (September 2011) 1. Section 1.0 “Electrical Characteristics”: Updated minor typographical corrections in both “DC Electrical Specifications” tables to show the correct unit for RL (kW instead of kW). Revision C (August 2011) 1. Added new MCP6406, MCP6407 and MCP6409 devices and the related information throughout the document. 2. Created two package type drawings based on the temperature characterization (see E Temp Package Types and H Temp Package Types). 3. Added MCP6406/7/9 specification tables in Section 1.3 “MCP6406/7/9 Electrical Specifications”. 4. Updated characterization graphics in Section 2.0 “Typical Performance Curves”. 5. Updated Table 3-1 in Section 3.0 “Pin Descriptions” to show all the devices. 6. Updated markings examples in Section 6.1 “Package Marking Information”. 7. Updated the package markings information to show all drawings available for each type of package. 8. Updated the Product Identification System page with the new devices and temperature specifications. 1. Added the MCP6402 and MCP6404 package information. 2. Updated the ESD protection value on all pins in Section 1.1 “Absolute Maximum Ratings †”. 3. Added Figure 2-36. 4. Updated Table 3-1. 5. Updated Section 4.1.2 “Input Voltage Limits”. 6. Added Section 4.1.3 “Input Current Limits”. 7. Added Section 4.5 “Unused Op Amps”. 8. Updated Section 5.4 “Analog Demonstration and Evaluation Boards”. 9. Updated the package markings information and drawings. 10. Updated the Product Identification System page. Revision A (December 2009) 1 MHz, 45 µA Op Amps Product Identification System a) MCP6401T-E/LT: Tape and Reel, Extended Temperature, 5LD SC70 pkg b) MCP6401T-E/OT: Tape and Reel, Extended Temperature, 5LD SOT-23 pkg c) MCP6401RT-E/OT: Tape and Reel, 5LD SOT-23 pkg d) MCP6401UT-E/OT: Tape and Reel, Extended Temperature, 5LD SOT-23 pkg e) MCP6402-E/SN: Extended Temperature, 8LD SOIC pkg f) MCP6402T-E/SN: Tape and Reel, Extended Temperature, 8LD SOIC pkg g) MCP6402T-E/MNY: Tape and Reel, Extended Temperature, 8LD 2x3 TDFN pkg h) MCP6404-E/SL: Extended Temperature, 14LD SOIC pkg i) MCP6404T-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC pkg j) MCP6404-E/ST: Extended Temperature, 14LD TSSOP pkg k) MCP6404T-E/ST: Tape and Reel, Extended Temperature, 14LD TSSOP pkg. a) MCP6401T-H/OT: Tape and Reel, High Temperature, 5LD SOT-23 pkg b) MCP6402-H/SN: High Temperature, 8LD SOIC pkg c) MCP6402T-H/SN: Tape and Reel, High Temperature, 8LD SOIC pkg d) MCP6404-H/SL: High Temperature, 14LD SOIC pkg e) MCP6404T-H/SL: Tape and Reel, High Temperature, 14LD SOIC pkg f) MCP6406T-H/OT: Tape and Reel, High Temperature, 5LD SOT-23 pkg g) MCP6407-H/SN: High Temperature, 8LD SOIC pkg h) MCP6407T-H/SN: Tape and Reel, High Temperature, 8LD SOIC pkg i) MCP6409-H/SL: High Temperature, 14LD SOIC pkg j) MCP6409T-H/SL: Tape and Reel, High Temperature, 14LD SOIC pkg Notes: Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Indianapolis Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service Trademarks Worldwide Sales and Service
