Datasheet MCP6471, MCP6472, MCP6474 (Microchip) - 9
| Manufacturer | Microchip |
| Description | The Microchip’s MCP6471 family of operational amplifiers (op amps) has low input bias current (150 pA, typical at 125°C) and rail-to-rail input and output operation |
| Pages / Page | 50 / 9 — MCP6471/2/4. Note:. 155. 140. 120. 125. = 5.5V. 100. 110. uiescent … |
| File Format / Size | PDF / 1.8 Mb |
| Document Language | English |
MCP6471/2/4. Note:. 155. 140. 120. 125. = 5.5V. 100. 110. uiescent Current. (µA/Amplifier). = 2.0V. +125°C. +85°C. = V. +25°C. -40°C. -50. -25. 0.0. 0.5. 1.0. 1.5
Model Line for this Datasheet
Text Version of Document
MCP6471/2/4 Note:
Unless otherwise indicated, T A = +25°C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF.
155 140 140 120 125 V = 5.5V DD 100 110 80 95 60 uiescent Current (µA/Amplifier) V = 2.0V DD Q 80 Q uiescent Current (µA/Amplifier) +125°C 40 Q +85°C Q V = V /4 CM DD V = V /4 +25°C 65 CM DD 20 -40°C 50 0 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-13:
Quiescent Current vs.
FIGURE 2-16:
Quiescent Current vs. Ambient Temperature. Power Supply Voltage.
145 120 0 130 Open-Loop Gain 100 -30 (°) 115 80 -60 100 Open-Loop Phase 60 -90 85 40 -120 iescent Current u (µA/Amplifier) u 70 n-Loop Gain (dB) n-Loop Phase Q 20 -150 e e V = 2.0V DD 55 Op Op 0 -180 40 -20 -210 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1 10 100 1k 10k 100k 1M 10M -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 Frequency (Hz) Common Mode Input Voltage (V) FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
Open-Loop Gain, Phase vs. Common Mode Input Voltage. Frequency.
150 145 V = 5.5V 130 140 DD 115 130 100 120 85 V = 2.0V (µA/Amplifier) DD pen-Loop Gain (dB) 70 110 11 Quiescent Current V = 5.5V DD 55 DC O 100 40 90 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125 Common Mode Input Voltage (V) Temperature (°C) FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs. Common Mode Input Voltage. Ambient Temperature. 2012-2013 Microchip Technology Inc. DS20002324C-page 9 Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6471/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6472/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service
Unless otherwise indicated, T A = +25°C, VDD = +2.0V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF.
155 140 140 120 125 V = 5.5V DD 100 110 80 95 60 uiescent Current (µA/Amplifier) V = 2.0V DD Q 80 Q uiescent Current (µA/Amplifier) +125°C 40 Q +85°C Q V = V /4 CM DD V = V /4 +25°C 65 CM DD 20 -40°C 50 0 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-13:
Quiescent Current vs.
FIGURE 2-16:
Quiescent Current vs. Ambient Temperature. Power Supply Voltage.
145 120 0 130 Open-Loop Gain 100 -30 (°) 115 80 -60 100 Open-Loop Phase 60 -90 85 40 -120 iescent Current u (µA/Amplifier) u 70 n-Loop Gain (dB) n-Loop Phase Q 20 -150 e e V = 2.0V DD 55 Op Op 0 -180 40 -20 -210 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1 10 100 1k 10k 100k 1M 10M -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 Frequency (Hz) Common Mode Input Voltage (V) FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
Open-Loop Gain, Phase vs. Common Mode Input Voltage. Frequency.
150 145 V = 5.5V 130 140 DD 115 130 100 120 85 V = 2.0V (µA/Amplifier) DD pen-Loop Gain (dB) 70 110 11 Quiescent Current V = 5.5V DD 55 DC O 100 40 90 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -50 -25 0 25 50 75 100 125 Common Mode Input Voltage (V) Temperature (°C) FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs. Common Mode Input Voltage. Ambient Temperature. 2012-2013 Microchip Technology Inc. DS20002324C-page 9 Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Temperature Specifications 1.3 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6471/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6472/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service
