Datasheet MCP6286 (Microchip) - 7

ManufacturerMicrochip
DescriptionThe MCP6286 operational amplifier offers low noise, low power and rail-to-rail output operation
Pages / Page28 / 7 — MCP6286. 2.0. TYPICAL PERFORMANCE CURVES. Note:. 14%. 800. Representative …
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Document LanguageEnglish

MCP6286. 2.0. TYPICAL PERFORMANCE CURVES. Note:. 14%. 800. Representative Part. 12%. 1360 Samples. DD = 2.2V. 600. rrenc 10%. (µ 400. cu 8%

MCP6286 2.0 TYPICAL PERFORMANCE CURVES Note: 14% 800 Representative Part 12% 1360 Samples DD = 2.2V 600 rrenc 10% (µ 400 cu 8%

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MCP6286 2.0 TYPICAL PERFORMANCE CURVES Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, T ≈ A = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/3, VOUT VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
14% 800 es V Representative Part 12% 1360 Samples DD = 2.2V 600 V) rrenc 10% (µ 400 e cu 8% ltag 200 Oc o V 0 6% et ffs -200 4% TA = +125°C t O u -400 TA = +85°C 2% p T In -600 A = +25°C Percentage of TA = -40°C 0% -800 00 00 00 00 00 00 00 0 0 0 0 0 0 0 0 .5 .3 .1 1 3 5 7 9 1 3 5 7 -8 -6 -5 -4 -3 -2 -1 10 20 30 40 50 60 80 -0 -0 -0 0. 0. 0. 0. 0. 1. 1. 1. 1. Input Offset Voltage (µV) Common Mode Input Voltage (V) FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.2V.
40% 500 es ) 400 35% 1360 Samples (µV 300 rrenc 30% u 200 age 25% lt 100 o 20% V 0 VDD = 2.2V of Occ e 15% -100 fset -200 10% entag -300 rc V 5% DD = 5.5V e Input Of -400 P 0% -500 .5 .0 .5 .0 .5 .0 .5 0 5 0 5 0 5 0 5 -3 -3 -2 -2 -1 -1 -0 0. 0. 1. 1. 2. 2. 3. 3. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Offset Drift with Temperature (µV/°C) Output Voltage (V) FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Input Offset Voltage vs. Output Voltage.
800 600 ) VDD = 5.5V Representative Part ) VCM = VCMR-L Representative Part V 600 V µ 400 e ( 400 e g 200 ltag 200 lta o o t V 0 t V 0 e e -200 ffs TA = +125°C ffs -200 TA = +125°C t O -400 TA = +85°C t O T u u A = +85°C p TA = +25°C p -400 TA = +25°C -600 In TA = -40°C In TA = -40°C -800 -600 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Common Mode Input Voltage (V) Power Supply Voltage (V) FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. Power Supply Voltage with VCM = VCMR_L. © 2009 Microchip Technology Inc. DS22196A-page 7 Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_L. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_H. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Common Mode Input Voltage Headroom vs. Ambient Temperature. FIGURE 2-13: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-14: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs Ambient Temperature. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 2.2V. FIGURE 2-22: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Slew Rate vs. Ambient Temperature. FIGURE 2-27: Small Signal Non-Inverting Pulse Response. FIGURE 2-28: Small Signal Inverting Pulse Response. FIGURE 2-29: Large Signal Non-Inverting Pulse Response. FIGURE 2-30: Large Signal Inverting Pulse Response. FIGURE 2-31: The MCP6286 Shows No Phase Reversal. FIGURE 2-32: Closed Loop Output Impedance vs. Frequency. FIGURE 2-33: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Application Information 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-4: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 PCB Surface Leakage FIGURE 4-5: Example Guard Ring Layout for Inverting Gain. 4.6 Application Circuits FIGURE 4-6: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-7: Second-Order, Low-Pass Butterwork Filter with Multiple-Feedback Topology. FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information