Datasheet MCP6491, MCP6492, MCP6494 (Microchip) - 7
| Manufacturer | Microchip |
| Description | The Microchip’s MCP6491 operational amplifiers (op amps) has low input bias current (150 pA, typical at 125°C) and rail-to-rail input and output operation |
| Pages / Page | 50 / 7 — MCP6491/2/4. 2.0. TYPICAL PERFORMANCE CURVES. Note:. 18%. 1000. +125°C. … |
| File Format / Size | PDF / 1.9 Mb |
| Document Language | English |
MCP6491/2/4. 2.0. TYPICAL PERFORMANCE CURVES. Note:. 18%. 1000. +125°C. 800. +85°C. 15%. 270 Samples V. = 3.0V. (µV). 600. +25°C. = V. -40°C. 12%. 400
Model Line for this Datasheet
Text Version of Document
MCP6491/2/4 2.0 TYPICAL PERFORMANCE CURVES Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, T A = +25°C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF.
18% 1000 +125°C 800 +85°C 15% 270 Samples V = 3.0V (µV) 600 +25°C DD V = V /4 -40°C 12% CM DD 400 ltage o 200 9% 0 6% -200 t Offset V -400 3% u Inp -600 V = 5.5V DD Representative Part Percentage of Occurrences 0% -800 0 -1000 -800 -600 -400 -200 200 400 600 800 -1200 -1000 1000 1200 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Input Offset Voltage (µV) Common Mode Input Voltage (V) FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage vs. Common Mode Input Voltage.
18% 1000 800 15% 270 Samples Representative Part (µV) V = 3.0V 600 DD V = V /4 V = 5.5V CM DD 400 DD 12% T = -40°C to +125°C A ltage o 200 9% 0 -200 V = 2.4V 6% DD t Offset V -400 -600 3% Inpu Percentage of Occurrences -800 -1000 0% -8 -6 -4 -2 0 2 4 6 8 -12 -10 10 12 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Offset Voltage Drift (µV/°C) Output Voltage (V) FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Input Offset Voltage vs. Output Voltage.
1000 1000 800 +125°C +125°C +85°C 800 (µV) 600 +85°C +25°C (µV) 600 +25°C -40°C 400 400 -40°C ltage o 200 ltage o 200 0 0 -200 -200 t Offset V -400 u t Offset V -400 -600 Inp V = 2.4V DD Inpu -600 Representative Part -800 Representative Part -800 -1000 -1000 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Common Mode Input Voltage (V) Power Supply Voltage (V) FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
Input Offset Voltage vs. Common Mode Input Voltage. Power Supply Voltage. 2012-2013 Microchip Technology Inc. DS20002321C-page 7 Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications 1.3 Test Circuits 2.0 Typical Performance Curves Figure 2-1: Input Offset Voltage Figure 2-2: Input Offset Voltage Drift Figure 2-3: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-4: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-5: Input Offset Voltage vs. Output Voltage Figure 2-6: Input Offset Voltage vs. Power Supply Voltage FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6491/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6492/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. Figure 4-3: Protecting the Analog Inputs 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps Figure 4-6: Unused Op Amps. Figure 4-7: Example Guard Ring Layout for Inverting Gain 4.6 PCB Surface Leakage 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, T A = +25°C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF.
18% 1000 +125°C 800 +85°C 15% 270 Samples V = 3.0V (µV) 600 +25°C DD V = V /4 -40°C 12% CM DD 400 ltage o 200 9% 0 6% -200 t Offset V -400 3% u Inp -600 V = 5.5V DD Representative Part Percentage of Occurrences 0% -800 0 -1000 -800 -600 -400 -200 200 400 600 800 -1200 -1000 1000 1200 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Input Offset Voltage (µV) Common Mode Input Voltage (V) FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage vs. Common Mode Input Voltage.
18% 1000 800 15% 270 Samples Representative Part (µV) V = 3.0V 600 DD V = V /4 V = 5.5V CM DD 400 DD 12% T = -40°C to +125°C A ltage o 200 9% 0 -200 V = 2.4V 6% DD t Offset V -400 -600 3% Inpu Percentage of Occurrences -800 -1000 0% -8 -6 -4 -2 0 2 4 6 8 -12 -10 10 12 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Input Offset Voltage Drift (µV/°C) Output Voltage (V) FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Input Offset Voltage vs. Output Voltage.
1000 1000 800 +125°C +125°C +85°C 800 (µV) 600 +85°C +25°C (µV) 600 +25°C -40°C 400 400 -40°C ltage o 200 ltage o 200 0 0 -200 -200 t Offset V -400 u t Offset V -400 -600 Inp V = 2.4V DD Inpu -600 Representative Part -800 Representative Part -800 -1000 -1000 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Common Mode Input Voltage (V) Power Supply Voltage (V) FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
Input Offset Voltage vs. Common Mode Input Voltage. Power Supply Voltage. 2012-2013 Microchip Technology Inc. DS20002321C-page 7 Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications 1.3 Test Circuits 2.0 Typical Performance Curves Figure 2-1: Input Offset Voltage Figure 2-2: Input Offset Voltage Drift Figure 2-3: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-4: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-5: Input Offset Voltage vs. Output Voltage Figure 2-6: Input Offset Voltage vs. Power Supply Voltage FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6491/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6492/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. Figure 4-3: Protecting the Analog Inputs 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps Figure 4-6: Unused Op Amps. Figure 4-7: Example Guard Ring Layout for Inverting Gain 4.6 PCB Surface Leakage 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service
