Datasheet AD8610, AD8620 (Analog Devices) - 3

ManufacturerAnalog Devices
DescriptionLow Input Bias Current, Wide BW JFET Precision Dual Op Amp
Pages / Page24 / 3 — AD8610/AD8620. SPECIFICATIONS. Table 1. Parameter. Symbol. Conditions. …
RevisionF
File Format / SizePDF / 374 Kb
Document LanguageEnglish

AD8610/AD8620. SPECIFICATIONS. Table 1. Parameter. Symbol. Conditions. Min. Typ. Max. Unit

AD8610/AD8620 SPECIFICATIONS Table 1 Parameter Symbol Conditions Min Typ Max Unit

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AD8610/AD8620 SPECIFICATIONS
@ VS = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS Offset Voltage (AD8610B) VOS 45 100 μV −40°C < TA < +125°C 80 200 μV Offset Voltage (AD8620B) VOS 45 150 μV −40°C < TA < +125°C 80 300 μV Offset Voltage (AD8610A/AD8620A) VOS 85 250 μV 25°C < TA < 125°C 90 350 μV −40°C < TA < +125°C 150 850 μV Input Bias Current IB −10 +2 +10 pA −40°C < TA < +85°C −250 +130 +250 pA −40°C < TA < +125°C −2.5 +1.5 +2.5 nA Input Offset Current IOS −10 +1 +10 pA −40°C < TA < +85°C −75 +20 +75 pA −40°C < TA < +125°C −150 +40 +150 pA Input Voltage Range −2 +3 V Common-Mode Rejection Ratio CMRR VCM = –1.5 V to +2.5 V 90 95 dB Large Signal Voltage Gain AVO RL = 1 kΩ, VO = −3 V to +3 V 100 180 V/mV Offset Voltage Drift (AD8610B) ΔVOS/ΔT −40°C < TA < +125°C 0.5 1 μV/°C Offset Voltage Drift (AD8620B) ΔVOS/ΔT −40°C < TA < +125°C 0.5 1.5 μV/°C Offset Voltage Drift (AD8610A/AD8620A) ΔVOS/ΔT −40°C < TA < +125°C 0.8 3.5 μV/°C OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 1 kΩ, −40°C < TA < +125°C 3.8 4 V Output Voltage Low VOL RL = 1 kΩ, −40°C < TA < +125°C −4 −3.8 V Output Current IOUT VOUT > ±2 V ±30 mA POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±5 V to ±13 V 100 110 dB Supply Current per Amplifier ISY VO = 0 V 2.5 3.0 mA −40°C < TA < +125°C 3.0 3.5 mA DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kΩ 40 50 V/μs Gain Bandwidth Product GBP 25 MHz Settling Time tS AV = +1, 4 V step, to 0.01% 350 ns NOISE PERFORMANCE Voltage Noise en p-p 0.1 Hz to 10 Hz 1.8 μV p-p Voltage Noise Density en f = 1 kHz 6 nV/√Hz Current Noise Density in f = 1 kHz 5 fA/√Hz Input Capacitance CIN Differential Mode 8 pF Common Mode 15 pF Channel Separation CS f = 10 kHz 137 dB f = 300 kHz 120 dB Rev. F | Page 3 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION FUNCTIONAL DESCRIPTION Power Consumption Driving Large Capacitive Loads Slew Rate (Unity Gain Inverting vs. Noninverting) Input Overvoltage Protection No Phase Reversal THD Readings vs. Common-Mode Voltage Noise vs. Common-Mode Voltage Settling Time Output Current Capability Operating with Supplies Greater than ±13 V Input Offset Voltage Adjustment Programmable Gain Amplifier (PGA) High Speed Instrumentation Amplifier High Speed Filters Second-Order, Low-Pass Filter High Speed, Low Noise Differential Driver OUTLINE DIMENSIONS ORDERING GUIDE