Datasheet LTC1408-12 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 6 Channel, 12-Bit, 600ksps Simultaneous Sampling ADC with Shutdown |
| Pages / Page | 20 / 7 — PI FU CTIO S SDO (Pin 1):. CH3+ (Pin 14):. CH3– (Pin 15):. OGND (Pin 2):. … |
| File Format / Size | PDF / 282 Kb |
| Document Language | English |
PI FU CTIO S SDO (Pin 1):. CH3+ (Pin 14):. CH3– (Pin 15):. OGND (Pin 2):. OVDD (Pin 3):. CH4+ (Pin 17):. CH0+ (Pin 4):
Model Line for this Datasheet
Text Version of Document
LTC1408-12
U U U PI FU CTIO S SDO (Pin 1):
Three-State Serial Data Output. Each set of
CH3+ (Pin 14):
Non-Inverting Channel 3. CH3+ operates six output data words represent the six analog input fully differentially with respect to CH3– with a 0V to 2.5V, channels at the start of the previous conversion. Data for or ±1.25V differential swing and a 0V to VDD absolute CH0 comes out first and data for CH5 comes out last. Each input range. data word comes out MSB first.
CH3– (Pin 15):
Inverting Channel 3. CH3– operates fully
OGND (Pin 2):
Ground Return for SDO Currents. Connect differentially with respect to CH3+ with a –2.5V to 0V, or to the solid ground plane. ±1.25V differential swing and a 0V to VDD absolute input range.
OVDD (Pin 3):
Power Supply for the SDO Pin. OVDD must be no more than 300mV higher than VDD and can be
CH4+ (Pin 17):
Non-Inverting Channel 4. CH4+ operates brought to a lower voltage to interface to low voltage logic fully differentially with respect to CH4– with a 0V to 2.5V, families. The unloaded high state at SDO is at the potential or ±1.25V differential swing and a 0V to VDD absolute input of OVDD. range.
CH0+ (Pin 4):
Non-Inverting Channel 0. CH0+ operates
CH4– (Pin 18):
Inverting Channel 4. CH4– operates fully fully differentially with respect to CH0– with a 0V to 2.5V, differentially with respect to CH4+ with a –2.5V to 0V, or or ±1.25V differential swing and a 0V to VDD absolute ±1.25V differential swing and a 0V to VDD absolute input input range. range.
CH0– (Pin 5):
Inverting Channel 0. CH0– operates fully
CH5+ (Pin 20):
Non-Inverting Channel 5. CH5+ operates differentially with respect to CH0+ with a –2.5V to 0V, fully differentially with respect to CH5– with a 0V to 2.5V, or ±1.25V differential swing and a 0V to VDD absolute or ±1.25V differential swing and a 0V to VDD absolute input input range. range.
GND (Pins 6, 9, 12, 13, 16, 19):
Analog Grounds. These
CH5– (Pin 21):
Inverting Channel 5. CH5– operates fully ground pins must be tied directly to the solid ground plane differentially with respect to CH5+ with a –2.5V to 0V, or under the part. Analog signal currents flow through these ±1.25V differential swing and a 0V to VDD absolute input connections. range.
CH1+ (Pin 7):
Non-Inverting Channel 1. CH1+ operates
GND (PIN 22):
Analog Ground for Reference. Analog fully differentially with respect to CH1– with a 0V to 2.5V, ground must be tied directly to the solid ground plane or ±1.25V differential swing and a 0V to VDD absolute under the part. Analog signal currents flow through this input range. connection. The 10µF reference bypass capacitor should be returned to this pad.
CH1– (Pin 8):
Inverting Channel 1. CH1– operates fully differentially with respect to CH1+ with a –2.5V to 0V,
VREF (Pin 23):
2.5V Internal Reference. Bypass to GND or ±1.25V differential swing and a 0V to VDD absolute and a solid analog ground plane with a 10µF ceramic input range. capacitor (or 10µF tantalum in parallel with 0.1µF ce- ramic). Can be overdriven by an external reference voltage
CH2+ (Pin 10):
Non-Inverting Channel 2. CH2+ operates between 2.55V and V fully differentially with respect to CH2– with a 0V to 2.5V, DD, VCC. or ±1.25V differential swing and a 0V to VDD absolute
VCC (Pin 24):
3V Positive Analog Supply. This pin supplies input range. 3V to the analog section. Bypass to the solid analog ground plane with a 10µF ceramic capacitor (or 10µF
CH2– (Pin 11):
Inverting Channel 2. CH2– operates fully tantalum) in parallel with 0.1µF ceramic. Care should be differentially with respect to CH2+ with a –2.5V to 0V, or ± taken to place the 0.1µF bypass capacitor as close to 1.25V differential swing and a 0V to VDD absolute Pin 24 as possible. Pin 24 must be tied to Pin 25. input range. 140812f 7
U U U PI FU CTIO S SDO (Pin 1):
Three-State Serial Data Output. Each set of
CH3+ (Pin 14):
Non-Inverting Channel 3. CH3+ operates six output data words represent the six analog input fully differentially with respect to CH3– with a 0V to 2.5V, channels at the start of the previous conversion. Data for or ±1.25V differential swing and a 0V to VDD absolute CH0 comes out first and data for CH5 comes out last. Each input range. data word comes out MSB first.
CH3– (Pin 15):
Inverting Channel 3. CH3– operates fully
OGND (Pin 2):
Ground Return for SDO Currents. Connect differentially with respect to CH3+ with a –2.5V to 0V, or to the solid ground plane. ±1.25V differential swing and a 0V to VDD absolute input range.
OVDD (Pin 3):
Power Supply for the SDO Pin. OVDD must be no more than 300mV higher than VDD and can be
CH4+ (Pin 17):
Non-Inverting Channel 4. CH4+ operates brought to a lower voltage to interface to low voltage logic fully differentially with respect to CH4– with a 0V to 2.5V, families. The unloaded high state at SDO is at the potential or ±1.25V differential swing and a 0V to VDD absolute input of OVDD. range.
CH0+ (Pin 4):
Non-Inverting Channel 0. CH0+ operates
CH4– (Pin 18):
Inverting Channel 4. CH4– operates fully fully differentially with respect to CH0– with a 0V to 2.5V, differentially with respect to CH4+ with a –2.5V to 0V, or or ±1.25V differential swing and a 0V to VDD absolute ±1.25V differential swing and a 0V to VDD absolute input input range. range.
CH0– (Pin 5):
Inverting Channel 0. CH0– operates fully
CH5+ (Pin 20):
Non-Inverting Channel 5. CH5+ operates differentially with respect to CH0+ with a –2.5V to 0V, fully differentially with respect to CH5– with a 0V to 2.5V, or ±1.25V differential swing and a 0V to VDD absolute or ±1.25V differential swing and a 0V to VDD absolute input input range. range.
GND (Pins 6, 9, 12, 13, 16, 19):
Analog Grounds. These
CH5– (Pin 21):
Inverting Channel 5. CH5– operates fully ground pins must be tied directly to the solid ground plane differentially with respect to CH5+ with a –2.5V to 0V, or under the part. Analog signal currents flow through these ±1.25V differential swing and a 0V to VDD absolute input connections. range.
CH1+ (Pin 7):
Non-Inverting Channel 1. CH1+ operates
GND (PIN 22):
Analog Ground for Reference. Analog fully differentially with respect to CH1– with a 0V to 2.5V, ground must be tied directly to the solid ground plane or ±1.25V differential swing and a 0V to VDD absolute under the part. Analog signal currents flow through this input range. connection. The 10µF reference bypass capacitor should be returned to this pad.
CH1– (Pin 8):
Inverting Channel 1. CH1– operates fully differentially with respect to CH1+ with a –2.5V to 0V,
VREF (Pin 23):
2.5V Internal Reference. Bypass to GND or ±1.25V differential swing and a 0V to VDD absolute and a solid analog ground plane with a 10µF ceramic input range. capacitor (or 10µF tantalum in parallel with 0.1µF ce- ramic). Can be overdriven by an external reference voltage
CH2+ (Pin 10):
Non-Inverting Channel 2. CH2+ operates between 2.55V and V fully differentially with respect to CH2– with a 0V to 2.5V, DD, VCC. or ±1.25V differential swing and a 0V to VDD absolute
VCC (Pin 24):
3V Positive Analog Supply. This pin supplies input range. 3V to the analog section. Bypass to the solid analog ground plane with a 10µF ceramic capacitor (or 10µF
CH2– (Pin 11):
Inverting Channel 2. CH2– operates fully tantalum) in parallel with 0.1µF ceramic. Care should be differentially with respect to CH2+ with a –2.5V to 0V, or ± taken to place the 0.1µF bypass capacitor as close to 1.25V differential swing and a 0V to VDD absolute Pin 24 as possible. Pin 24 must be tied to Pin 25. input range. 140812f 7
