Datasheet LTC1605 (Analog Devices) - 5

LTC1605
TIMING CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC1605/LTC1605A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE(MAX) Maximum Sampling Frequency l 100 kHz tCONV Conversion Time l 8 µs tACQ Acquisition Time l 2 µs t1 Convert Pulse Width (Note 11) l 40 ns t2 Data Valid Delay After R/C↓ (Note 9) l 8 µs t3 BUSY Delay from R/C↓ CL = 50pF l 65 ns t4 BUSY Low 8 µs t5 BUSY Delay After End of Conversion 220 ns t6 Aperture Delay 40 ns t7 Bus Relinquish Time l 10 35 83 ns t8 BUSY Delay After Data Valid l 50 200 ns t9 Previous Data Valid After R/C↓ 7.4 µs t10 R/C to CS Setup Time (Notes 9, 10) 10 ns t11 Time Between Conversions 10 µs t12 Bus Access and Byte Delay (Notes 9, 10) 10 83 ns
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC1605/LTC1605A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage (Notes 9, 10) 4.75 5.25 V IDD Positive Supply Current l 11 16 mA PDIS Power Dissipation 55 80 mW
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 8:
Bipolar offset is the offset voltage measured from –0.5LSB when the may cause permanent damage to the device. Exposure to any Absolute output code flickers between 0000 0000 0000 0000 and 1111 1111 1111 1111. Maximum Rating condition for extended periods may affect device
Note 9:
Guaranteed by design, not subject to test. reliability and lifetime.
Note 10:
Recommended operating conditions.
Note 2:
All voltage values are with respect to ground with DGND, AGND1
Note 11:
With CS low the falling R/C edge starts a conversion. If R/C and AGND2 wired together (unless otherwise noted). returns high at a critical point during the conversion it can create small
Note 3:
When these pin voltages are taken below ground or above VANA errors. For best results ensure that R/C returns high within 3µs after the = VDIG = VDD, they will be clamped by internal diodes. This product can start of the conversion. handle input currents of greater than 100mA below ground or above VDD
Note 12:
As measured with fixed resistors shown in Figure 4. Adjustable to without latch-up. zero with external potentiometer.
Note 4:
When these pin voltages are taken below ground, they will be
Note 13:
Full-scale error is the worst-case of –FS or +FS untrimmed clamped by internal diodes. This product can handle input currents of deviation from ideal first and last code transitions, divided by the transition 90mA below ground without latchup. These pins are not clamped to VDD. voltage (not divided by the full-scale range) and includes the effect of
Note 5:
VDD = 5V, fSAMPLE = 100kHz, tr = tf = 5ns unless otherwise specified. offset error.
Note 6:
Linearity, offset and full-scale specifications apply for a VIN input
Note 14:
All specifications in dB are referred to a full-scale ±10V input. with respect to ground.
Note 15:
Full-power bandwidth is defined as full-scale input frequency at which
Note 7:
Integral nonlinearity is defined as the deviation of a code from a a signal-to-(noise + distortion) degrades to 60dB or 10 bits of accuracy. straight line passing through the actual end points of the transfer curve.
Note 16:
Recovers to specified performance after (2 • FS) input The deviation is measured from the center of the quantization band. overvoltage. 1605fd For more information www.linear.com/LTC1605 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Timing Characteristics Power Requirements Typical Performance Characteristics Pin Functions Test Circuit Functional Block Diagram Applications Information Package Description Revision History Package Description Related Parts