Datasheet LTC1609 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | 16-Bit, 200ksps, Serial Sampling ADC with Multiple Input Ranges |
| Pages / Page | 24 / 5 — POWER REQUIREMENTS The. indicates specifications which apply over the … |
| File Format / Size | PDF / 438 Kb |
| Document Language | English |
POWER REQUIREMENTS The. indicates specifications which apply over the full operating temperature range,
Model Line for this Datasheet
- LTC1609ACSW#PBF LTC1609ACSW#PBF LTC1609ACSW#TRPBF LTC1609ACSW#TRPBF LTC1609AISW#PBF LTC1609AISW#PBF LTC1609AISW#TRPBF LTC1609AISW#TRPBF LTC1609CG#PBF LTC1609CG#PBF LTC1609CG#TRPBF LTC1609CG#TRPBF LTC1609CSW#PBF LTC1609CSW#PBF LTC1609CSW#TRPBF LTC1609CSW#TRPBF LTC1609IG#PBF LTC1609IG#PBF LTC1609IG#TRPBF LTC1609IG#TRPBF LTC1609ISW#PBF LTC1609ISW#PBF LTC1609ISW#TRPBF LTC1609ISW#TRPBF
Text Version of Document
LTC1609
W U POWER REQUIREMENTS The
●
indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) LTC1609/LTC1609A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage (Notes 9, 10) 4.75 5.25 V IDD Positive Supply Current PWRD = Low ● 13 20 mA PDIS Power Dissipation PWRD = Low 65 100 mW PWRD = High 50 µW
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 9:
Guaranteed by design, not subject to test. of a device may be impaired.
Note 10:
Recommended operating conditions.
Note 2:
All voltage values are with respect to ground with DGND, AGND1
Note 11:
With CS low the falling R/C edge starts a conversion. If R/C and AGND2 wired together (unless otherwise noted). returns high at a critical point during the conversion it can create small
Note 3:
When these pin voltages are taken below ground or above VANA = errors. For best results ensure that R/C returns high within 1.2µs after the VDIG = VDD, they will be clamped by internal diodes. This product can start of the conversion. handle input currents of greater than 100mA below ground or above VDD
Note 12:
As measured with fixed 1% resistors shown in Figures 3a and without latch-up. 3b. Adjustable to zero with external potentiometer.
Note 4:
When these pin voltages are taken below ground, they will be
Note 13:
Full-scale error is the worst-case of –FS or +FS untrimmed clamped by internal diodes. This product can handle input currents of deviation from ideal first and last code transitions, divided by the transition 90mA below ground without latchup. These pins are not clamped to VDD. voltage (not divided by the full-scale range) and includes the effect of
Note 5:
VDD = 5V, fSAMPLE = 200kHz, tr = tf = 5ns unless otherwise offset error. For unipolar input ranges full-scale error is the deviation of specified. the last code transition from ideal divided by the transiton voltage and
Note 6:
Linearity, offset and full-scale specifications apply for a V includes the effect of offset error. IN input with respect to ground.
Note 14:
All specifications in dB are referred to a full-scale ±5V input.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
Note 15:
Full-power bandwidth is defined as full-scale input frequency at straight line passing through the actual end points of the transfer curve. which a signal-to-(noise + distortion) degrades to 60dB or 10 bits of The deviation is measured from the center of the quantization band. accuracy.
Note 8:
Bipolar zero error is the offset voltage measured from – 0.5 LSB
Note 16:
Recovers to specified performance after (2 • FS) input when the output code flickers between 0000 0000 0000 0000 and 1111 overvoltage. 1111 1111 1111. Unipolar zero error is the offset voltage measured from
Note 17:
When data is shifted out during a conversion, with an external 0.5LSB when the output codes flickers between 0000. .0000 and 0000. data clock, complete the process within 1.2µs from the start of the .0001. conversion (BUSY falling). This will help keep any external disturbances from causing an error in the conversion result. 1609fa 5
W U POWER REQUIREMENTS The
●
indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) LTC1609/LTC1609A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage (Notes 9, 10) 4.75 5.25 V IDD Positive Supply Current PWRD = Low ● 13 20 mA PDIS Power Dissipation PWRD = Low 65 100 mW PWRD = High 50 µW
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 9:
Guaranteed by design, not subject to test. of a device may be impaired.
Note 10:
Recommended operating conditions.
Note 2:
All voltage values are with respect to ground with DGND, AGND1
Note 11:
With CS low the falling R/C edge starts a conversion. If R/C and AGND2 wired together (unless otherwise noted). returns high at a critical point during the conversion it can create small
Note 3:
When these pin voltages are taken below ground or above VANA = errors. For best results ensure that R/C returns high within 1.2µs after the VDIG = VDD, they will be clamped by internal diodes. This product can start of the conversion. handle input currents of greater than 100mA below ground or above VDD
Note 12:
As measured with fixed 1% resistors shown in Figures 3a and without latch-up. 3b. Adjustable to zero with external potentiometer.
Note 4:
When these pin voltages are taken below ground, they will be
Note 13:
Full-scale error is the worst-case of –FS or +FS untrimmed clamped by internal diodes. This product can handle input currents of deviation from ideal first and last code transitions, divided by the transition 90mA below ground without latchup. These pins are not clamped to VDD. voltage (not divided by the full-scale range) and includes the effect of
Note 5:
VDD = 5V, fSAMPLE = 200kHz, tr = tf = 5ns unless otherwise offset error. For unipolar input ranges full-scale error is the deviation of specified. the last code transition from ideal divided by the transiton voltage and
Note 6:
Linearity, offset and full-scale specifications apply for a V includes the effect of offset error. IN input with respect to ground.
Note 14:
All specifications in dB are referred to a full-scale ±5V input.
Note 7:
Integral nonlinearity is defined as the deviation of a code from a
Note 15:
Full-power bandwidth is defined as full-scale input frequency at straight line passing through the actual end points of the transfer curve. which a signal-to-(noise + distortion) degrades to 60dB or 10 bits of The deviation is measured from the center of the quantization band. accuracy.
Note 8:
Bipolar zero error is the offset voltage measured from – 0.5 LSB
Note 16:
Recovers to specified performance after (2 • FS) input when the output code flickers between 0000 0000 0000 0000 and 1111 overvoltage. 1111 1111 1111. Unipolar zero error is the offset voltage measured from
Note 17:
When data is shifted out during a conversion, with an external 0.5LSB when the output codes flickers between 0000. .0000 and 0000. data clock, complete the process within 1.2µs from the start of the .0001. conversion (BUSY falling). This will help keep any external disturbances from causing an error in the conversion result. 1609fa 5
