Datasheet LTC1744 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 14-Bit, 50Msps ADC |
| Pages / Page | 24 / 1 — FEATURES. DESCRIPTIO. Sample Rate: 50Msps. 77dB SNR and 87dB SFDR (3.2V … |
| File Format / Size | PDF / 556 Kb |
| Document Language | English |
FEATURES. DESCRIPTIO. Sample Rate: 50Msps. 77dB SNR and 87dB SFDR (3.2V Range). 73.5dB SNR and 90dB SFDR (2V Range). APPLICATIO S
Model Line for this Datasheet
Text Version of Document
LTC1744 14-Bit, 50Msps ADC
U FEATURES DESCRIPTIO
■
Sample Rate: 50Msps
The LTC®1744 is a 50Msps, sampling 14-bit A/D con- ■
77dB SNR and 87dB SFDR (3.2V Range)
verter designed for digitizing high frequency, wide dynamic ■
73.5dB SNR and 90dB SFDR (2V Range)
range signals. Pin selectable input ranges of ±1V and ±1.6V ■ No Missing Codes along with a resistor programmable mode allow the ■ Single 5V Supply LTC1744’s input range to be optimized for a wide variety ■ Power Dissipation: 1.2W of applications. ■ Selectable Input Ranges: ±1V or ±1.6V The LTC1744 is perfect for demanding communications ■ 150MHz Full Power Bandwidth S/H applications with AC performance that includes 77dB ■ Pin Compatible Family SNR and 87dB spurious free dynamic range. Ultralow jitter 25Msps: LTC1746 (14 Bit), LTC1745 (12 Bit) of 0.3ps 50Msps: LTC1744 (14 Bit), LTC1743 (12 Bit) RMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±4LSB 65Msps: LTC1742 (14 Bit), LTC1741 (12 Bit) maximum INL and no missing codes over temperature. 80Msps: LTC1748 (14 Bit), LTC1747 (12 Bit) ■ 48-Pin TSSOP Package The digital interface is compatible with 5V, 3V and 2V logic
U
systems. The ENC and ENC inputs may be driven differen-
APPLICATIO S
tially from PECL, GTL and other low swing logic families or from single-ended TTL or CMOS. The low noise, high gain ■ Telecommunications ENC and ENC inputs may also be driven by a sinusoidal ■ Receivers signal without degrading performance. A separate output ■ Base Stations power supply can be operated from 0.5V to 5V, making it ■ Spectrum Analysis easy to connect directly to any low voltage DSPs or FIFOs. ■ Imaging Systems The TSSOP package with a flow-through pinout simplifies , LTC and LT are registered trademarks of Linear Technology Corporation. the board layout.
W BLOCK DIAGRA 50Msps, 14-Bit ADC with a
±
1V Differential Input Range
OVDD 0.5V TO 5V 0.1µF 0.1µF A + IN OF ±1V CORRECTION 14 D13 DIFFERENTIAL S/H 14-BIT LOGIC AND OUTPUT • • ANALOG INPUT CIRCUIT PIPELINED ADC SHIFT LATCHES • A – D0 IN REGISTER CLKOUT SENSE OGND BUFFER VDD 5V RANGE 1µF 1µF 1µF SELECT DIFF AMP VCM GND 2.5VREF CONTROL LOGIC 4.7µF 1744 BD REFLB REFHA REFLA REFHB ENC ENC MSBINV OE 4.7µF DIFFERENTIAL 0.1µF 0.1µF ENCODE INPUT 1µF 1µF 1744f 1
U FEATURES DESCRIPTIO
■
Sample Rate: 50Msps
The LTC®1744 is a 50Msps, sampling 14-bit A/D con- ■
77dB SNR and 87dB SFDR (3.2V Range)
verter designed for digitizing high frequency, wide dynamic ■
73.5dB SNR and 90dB SFDR (2V Range)
range signals. Pin selectable input ranges of ±1V and ±1.6V ■ No Missing Codes along with a resistor programmable mode allow the ■ Single 5V Supply LTC1744’s input range to be optimized for a wide variety ■ Power Dissipation: 1.2W of applications. ■ Selectable Input Ranges: ±1V or ±1.6V The LTC1744 is perfect for demanding communications ■ 150MHz Full Power Bandwidth S/H applications with AC performance that includes 77dB ■ Pin Compatible Family SNR and 87dB spurious free dynamic range. Ultralow jitter 25Msps: LTC1746 (14 Bit), LTC1745 (12 Bit) of 0.3ps 50Msps: LTC1744 (14 Bit), LTC1743 (12 Bit) RMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±4LSB 65Msps: LTC1742 (14 Bit), LTC1741 (12 Bit) maximum INL and no missing codes over temperature. 80Msps: LTC1748 (14 Bit), LTC1747 (12 Bit) ■ 48-Pin TSSOP Package The digital interface is compatible with 5V, 3V and 2V logic
U
systems. The ENC and ENC inputs may be driven differen-
APPLICATIO S
tially from PECL, GTL and other low swing logic families or from single-ended TTL or CMOS. The low noise, high gain ■ Telecommunications ENC and ENC inputs may also be driven by a sinusoidal ■ Receivers signal without degrading performance. A separate output ■ Base Stations power supply can be operated from 0.5V to 5V, making it ■ Spectrum Analysis easy to connect directly to any low voltage DSPs or FIFOs. ■ Imaging Systems The TSSOP package with a flow-through pinout simplifies , LTC and LT are registered trademarks of Linear Technology Corporation. the board layout.
W BLOCK DIAGRA 50Msps, 14-Bit ADC with a
±
1V Differential Input Range
OVDD 0.5V TO 5V 0.1µF 0.1µF A + IN OF ±1V CORRECTION 14 D13 DIFFERENTIAL S/H 14-BIT LOGIC AND OUTPUT • • ANALOG INPUT CIRCUIT PIPELINED ADC SHIFT LATCHES • A – D0 IN REGISTER CLKOUT SENSE OGND BUFFER VDD 5V RANGE 1µF 1µF 1µF SELECT DIFF AMP VCM GND 2.5VREF CONTROL LOGIC 4.7µF 1744 BD REFLB REFHA REFLA REFHB ENC ENC MSBINV OE 4.7µF DIFFERENTIAL 0.1µF 0.1µF ENCODE INPUT 1µF 1µF 1744f 1
