Datasheet LTC1746 (Analog Devices) - 4

ManufacturerAnalog Devices
DescriptionLow Power,14-Bit, 25Msps ADC
Pages / Page20 / 4 — DIGITAL I PUTS A D DIGITAL OUTPUTS The. indicates specifications which …
File Format / SizePDF / 217 Kb
Document LanguageEnglish

DIGITAL I PUTS A D DIGITAL OUTPUTS The. indicates specifications which apply over the full

DIGITAL I PUTS A D DIGITAL OUTPUTS The indicates specifications which apply over the full

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LTC1746
U U DIGITAL I PUTS A D DIGITAL OUTPUTS The

indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIH High Level Input Voltage VDD = 5.25V ● 2.4 V VIL Low Level Input Voltage VDD = 4.75V ● 0.8 V IIN Digital Input Current VIN = 0V to VDD ● ±10 µA CIN Digital Input Capacitance MSBINV and OE Only 1.5 pF VOH High Level Output Voltage OVDD = 4.75V IO = –10µA 4.74 V IO = – 200µA ● 4 V VOL Low Level Output Voltage OVDD = 4.75V IO = 160µA 0.05 V IO = 1.6mA ● 0.1 0.4 V IOZ Hi-Z Output Leakage D13 to D0 VOUT = 0V to VDD, OE = High ● ±10 µA COZ Hi-Z Output Capacitance D13 to D0 OE = High (Note 8) ● 15 pF ISOURCE Output Source Current VOUT = 0V – 50 mA ISINK Output Sink Current VOUT = 5V 50 mA
W U POWER REQUIRE E TS The

indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Positive Supply Voltage 4.75 5.25 V IDD Positive Supply Current 2V Range, Full-Scale Input ● 78 93 mA PDIS Power Dissipation 2V Range, Full-Scale Input ● 390 465 mW OVDD Digital Output Supply Voltage 0.5 VDD V
W U TI I G CHARACTERISTICS The

indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSAMPLE Sampling Frequency (Note 9) ● 1 25 MHz t1 ENC Low Time (Note 9) ● 19 20 1000 ns t2 ENC High Time (Note 9) ● 19 20 1000 ns t3 Aperture Delay of Sample-and-Hold (Note 8) 0 ns t4 ENC to Data Delay CL = 10pF (Note 8) ● 1.4 4 10 ns t5 ENC to CLKOUT Delay CL = 10pF (Note 8) ● 0.5 2 5 ns t6 CLKOUT to Data Delay CL = 10pF (Note 8) ● 0 2 ns t7 DATA Access Time After OE ↓ CL = 10pF (Note 8) 10 25 ns t8 BUS Relinquish Time (Note 8) 10 25 ns Data Latency 5 cycles
Note 1:
Absolute Maximum Ratings are those values beyond which the life
Note 5:
VDD = 5V, fSAMPLE = 25MHz, differential ENC/ENC = 2VP-P 25MHz of a device may be impaired. sine wave, input range = ±1.6V differential, unless otherwise specified.
Note 2:
All voltage values are with respect to ground with GND
Note 6:
Integral nonlinearity is defined as the deviation of a code from a (unless otherwise noted). straight line passing through the actual endpoints of the transfer curve.
Note 3:
When these pin voltages are taken below GND or above V The deviation is measured from the center of the quantization band. DD, they will be clamped by internal diodes. This product can handle input currents
Note 7:
Bipolar offset is the offset voltage measured from – 0.5 LSB of greater than 100mA below GND or above VDD without latchup. when the output code flickers between 00 0000 0000 0000 and 11
Note 4:
When these pin voltages are taken below GND, they will be 1111 1111 1111. clamped by internal diodes. This product can handle input currents of
Note 8:
Guaranteed by design, not subject to test. >100mA below GND without latchup. These pins are not clamped to VDD.
Note 9:
Recommended operating conditions. 1746f 4