Datasheet LTC2224 (Analog Devices) - 10

ManufacturerAnalog Devices
Description12-Bit, 135Msps ADC
Pages / Page24 / 10 — FUNCTIONAL BLOCK DIAGRA. Figure 1. Functional Block Diagram
File Format / SizePDF / 625 Kb
Document LanguageEnglish

FUNCTIONAL BLOCK DIAGRA. Figure 1. Functional Block Diagram

FUNCTIONAL BLOCK DIAGRA Figure 1 Functional Block Diagram

Model Line for this Datasheet

Text Version of Document

LTC2224
U U W FUNCTIONAL BLOCK DIAGRA
A + IN INPUT FIRST PIPELINED SECOND PIPELINED THIRD PIPELINED FOURTH PIPELINED FIFTH PIPELINED – S/H A ADC STAGE ADC STAGE ADC STAGE ADC STAGE ADC STAGE IN VCM 1.6V REFERENCE 2.2µF SHIFT REGISTER AND CORRECTION RANGE SELECT REFH REFL INTERNAL CLOCK SIGNALS OVDD REF SENSE BUF OF DIFFERENTIAL D11 DIFF INPUT CONTROL OUTPUT • REF LOW JITTER LOGIC • DRIVERS AMP CLOCK • D0 DRIVER CLOCKOUT 2224 F01 REFLB REFHA REFLA REFHB OGND 2.2µF ENC+ ENC– M0DE SHDN OE 0.1µF 0.1µF 1µF 1µF
Figure 1. Functional Block Diagram
2224fa 10