Datasheet LTC2258-14, LTC2257-14, LTC2256-14 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 14-Bit, 65Msps Ultralow Power 1.8V ADCs |
| Pages / Page | 34 / 9 — TiMing DiagraMs. Double Data Rate LVDS Output Mode Timing. All Outputs … |
| File Format / Size | PDF / 1.4 Mb |
| Document Language | English |
TiMing DiagraMs. Double Data Rate LVDS Output Mode Timing. All Outputs Are Differential and Have LVDS Levels
Model Line for this Datasheet
- LTC2256CUJ-14#PBF LTC2256CUJ-14#PBF LTC2256CUJ-14#TRPBF LTC2256CUJ-14#TRPBF LTC2256IUJ-14#PBF LTC2256IUJ-14#PBF LTC2256IUJ-14#TRPBF LTC2256IUJ-14#TRPBF
Text Version of Document
LTC2258-14 LTC2257-14/LTC2256-14
TiMing DiagraMs Double Data Rate LVDS Output Mode Timing All Outputs Are Differential and Have LVDS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1+ D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 D0_1– ••• D12_13+ D12N-5 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 D12_13– OF+ OFN-5 OFN-4 OFN-3 OFN-3 OF– tC tC CLKOUT+ CLKOUT– 225814 TD03
SPI Port Timing (Readback Mode)
tS tDS tDH tSCK tH CS SCK tDO SDI R/W A6 A5 A4 A3 A2 A1 A0 XX XX XX XX XX XX XX XX SDO D7 D6 D5 D4 D3 D2 D1 D0 HIGH IMPEDANCE
SPI Port Timing (Write Mode)
CS SCK SDI R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 SDO 225814 TD04 HIGH IMPEDANCE 225814fc Fo F r o rmo m r o e r e inf n o f r o m r a m t a iton o n ww w w w . w line n a e r a .co c m o / m L / T L C T 2 C 2 2 5 2 8 5 - 8 1 - 4 1 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configurations Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts
TiMing DiagraMs Double Data Rate LVDS Output Mode Timing All Outputs Are Differential and Have LVDS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1+ D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 D0_1– ••• D12_13+ D12N-5 D13N-5 D12N-4 D13N-4 D12N-3 D13N-3 D12N-2 D13N-2 D12_13– OF+ OFN-5 OFN-4 OFN-3 OFN-3 OF– tC tC CLKOUT+ CLKOUT– 225814 TD03
SPI Port Timing (Readback Mode)
tS tDS tDH tSCK tH CS SCK tDO SDI R/W A6 A5 A4 A3 A2 A1 A0 XX XX XX XX XX XX XX XX SDO D7 D6 D5 D4 D3 D2 D1 D0 HIGH IMPEDANCE
SPI Port Timing (Write Mode)
CS SCK SDI R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 SDO 225814 TD04 HIGH IMPEDANCE 225814fc Fo F r o rmo m r o e r e inf n o f r o m r a m t a iton o n ww w w w . w line n a e r a .co c m o / m L / T L C T 2 C 2 2 5 2 8 5 - 8 1 - 4 1 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configurations Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts
