Datasheet LTC2268-14, LTC2267-14, LTC2266-14 (Analog Devices) - 3

ManufacturerAnalog Devices
Description14-Bit, 125Msps Low Power Dual ADCs
Pages / Page32 / 3 — converTer characTerisTics. The. denotes the specifications which apply …
File Format / SizePDF / 700 Kb
Document LanguageEnglish

converTer characTerisTics. The. denotes the specifications which apply over the full operating

converTer characTerisTics The denotes the specifications which apply over the full operating

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LTC2268-14/ LTC2267-14/LTC2266-14
converTer characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2268-14 LTC2267-14 LTC2266-14 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution l 14 14 14 Bits (No Missing Codes) Integral Linearity Error Differential Analog Input l –3.5 ±1 3.5 –3.5 ±1 3.5 –2.75 ±1 2.75 LSB (Note 6) Differential Linearity Error Differential Analog Input l –0.8 ±0.3 0.8 –0.8 ±0.3 0.8 –0.8 ±0.3 0.8 LSB Offset Error (Note 7) l –12 ±3 12 –12 ±3 12 –12 ±3 2 mV Gain Error Internal Reference –0.9 –0.9 –0.9 %FS External Reference l –2.3 –0.9 0.5 –2.3 –0.9 0.5 –2.3 –0.9 0.5 %FS Offset Drift ±20 ±20 ±20 µV/°C Full-Scale Drift Internal Reference ±30 ±30 ±30 ppm/°C External Reference ±10 ±10 ±10 ppm/°C Gain Matching External Reference ±0.2 ±0.2 ±0.2 %FS Offset Matching ±3 ±3 ±3 mV Transition Noise External Reference 1.2 1.2 1.2 LSBRMS
analog inpuT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP–P V + – IN(CM) Analog Input Common Mode (AIN – AIN )/2 Differential Analog Input (Note 8) l VCM – 100mV VCM VCM +100mV V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.25 1.3 V IINCM Analog Input Common Mode Current Per Pin, 125Msps l 155 µA Per Pin, 105Msps 130 µA Per Pin, 80Msps 100 µA I + – IN1 Analog Input Leakage Current (No Encode) 0 < AIN , AIN < VDD l –1 1 µA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 µA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –6 6 µA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter 0.15 psRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full Power Bandwidth Figure 6 Test Circuit 800 MHz 22687614fa 3 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Digital Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Electrical Characteristics Timing Diagrams Typical perForMance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts