Datasheet LTC2302, LTC2306 (Analog Devices) - 10

LTC2302/LTC2306
pin FuncTions LTC2302 LTC2306 SDO (Pin 1):
Three‑State Serial Data Out. SDO outputs
SDO (Pin 1):
Three‑State Serial Data Out. SDO outputs the data from the previous conversion. SDO is shifted the data from the previous conversion. SDO is shifted out serially on the falling edge of each SCK pulse. SDO is out serially on the falling edge of each SCK pulse. SDO is enabled by a low level on CONVST. enabled by a low level on CONVST.
CONVST (Pin 2):
Conversion Start. A rising edge at
CONVST (Pin 2):
Conversion Start. A rising edge at CONVST begins a conversion. For best performance, CONVST begins a conversion. For best performance, ensure that CONVST returns low within 40ns after the ensure that CONVST returns low within 40ns after the conversion starts or after the conversion ends. conversion starts or after the conversion ends.
VDD (Pin 3):
5V Supply. The range of VDD is 4.75V to 5.25V.
VDD (Pin 3):
5V Supply. The range of VDD is 4.75V to 5.25V. Bypass VDD to GND with a 0.1µF ceramic capacitor and a Bypass VDD to GND with a 0.1µF ceramic capacitor and a 10µF tantalum capacitor in parallel. 10µF tantalum capacitor in parallel.
IN+, IN– (Pin 4, Pin 5):
Positive (IN+) and Negative (IN–)
CH0, CH1 (Pin 4, Pin 5):
Channel 0 and Channel 1 Analog Differential Analog Inputs. Inputs. CH0, CH1 can be configured as single‑ended or
V
differential input channels. See the Analog Input Multi‑
REF (Pin 6):
Reference Input. Connect an external refer‑ ence at V plexer section. REF . The range of the external reference is 0.1V to VDD. Bypass to GND with a minimum 10µF tantalum
VREF (Pin 6):
Reference Input. Connect an external refer‑ capacitor in parallel with a 0.1µF ceramic capacitor. ence at VREF .The range of the external reference is 0.1V
GND (Pin 7):
Ground. All GND pins must be connected to to VDD. Bypass to GND with a minimum 10µF tantalum a solid ground plane. capacitor in parallel with a 0.1µF ceramic capacitor.
SDI (Pin 8):
Serial Data Input. The SDI serial bit stream
GND (Pin 7):
Ground. All GND pins must be connected to configures the ADC and is latched on the rising edge of a solid ground plane. the first 6 SCK pulses.
SDI (Pin 8):
Serial Data Input. The SDI serial bit stream
SCK (Pin 9):
Serial Data Clock. SCK synchronizes the configures the ADC and is latched on the rising edge of serial data transfer. The serial data input at SDI is latched the first 6 SCK pulses. on the rising edge of SCK. The serial data output at SDO
SCK (Pin 9):
Serial Data Clock. SCK synchronizes the transitions on the falling edge of SCK. serial data transfer. The serial data input at SDI is latched
OV
on the rising edge of SCK. The serial data output at SDO
DD (Pin 10):
Output Driver Supply. Bypass OVDD to GND with a 0.1µF ceramic capacitor close to the pin. The transitions on the falling edge of SCK. range of OVDD is 2.7V to 5.25V.
OVDD (Pin 10):
Output Driver Supply. Bypass OVDD to
Exposed Pad (Pin 11):
Exposed Pad Ground. Must be OGND with a 0.1µF ceramic capacitor close to the pin. soldered directly to ground plane. The range of OVDD is 2.7V to 5.5V.
Exposed Pad (Pin 11):
Exposed Pad Ground. Must be soldered directly to ground plane. 23026fb 10 For more information www.linear.com/LTC2302 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Related Parts