Datasheet LTC2312-12 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 12-Bit, 500ksps Serial Sampling ADC in TSOT |
| Pages / Page | 22 / 9 — block DiagraM. TiMing DiagraMs. Figure 1. SDO Enabled After CONV. Figure … |
| File Format / Size | PDF / 520 Kb |
| Document Language | English |
block DiagraM. TiMing DiagraMs. Figure 1. SDO Enabled After CONV. Figure 2. SDO Into Hi-Z After CONV
Model Line for this Datasheet
- LTC2312CTS8-12#PBF LTC2312CTS8-12#TRMPBF LTC2312CTS8-12#TRMPBF LTC2312CTS8-12#TRPBF LTC2312CTS8-12#TRPBF LTC2312HTS8-12#PBF LTC2312HTS8-12#TRMPBF LTC2312HTS8-12#TRMPBF LTC2312HTS8-12#TRPBF LTC2312HTS8-12#TRPBF LTC2312ITS8-12#PBF LTC2312ITS8-12#TRMPBF LTC2312ITS8-12#TRMPBF LTC2312ITS8-12#TRPBF LTC2312ITS8-12#TRPBF
Text Version of Document
LTC2312-12
block DiagraM
2.2µF 2.2µF ANALOG SUPPLY I/O INTERFACE SUPPLY 3V OR 5V RANGE 1.8V TO 5V 1 5 VDD OVDD 2.5V LDO A ANALOG IN INPUT RANGE 4 + THREE-STATE SDO 0V TO VREF SERIAL S/H 12-BIT SAR ADC 6 OUTPUT – PORT REF SCK 2 7 TIMING 2.2µF GND 1.024V CONV 2×/4× LOGIC 3 BANDGAP 8 TS8 PACKAGE 231212 BD ALL CAPACITORS UNLESS NOTED ARE HIGH QUALITY, CERAMIC CHIP TYPE
TiMing DiagraMs
t3 t8 CONV CONV OVDD/2 OVDD/2 Hi-Z VOH Hi-Z SDO MSB SDO VOL
Figure 1. SDO Enabled After CONV
↓
Figure 2. SDO Into Hi-Z After CONV
↑ 231312 TD01 231312 TD02 t7 t4 SCK SCK OVDD/2 OVDD/2 V V OH OH SDO V SDO OL VOL
Figure 3. SDO Data Valid Hold After SCK
↓
Figure 4. SDO Data Valid Access After SCK
↓ 231312 TD03 231212 TD04 231212fa For more information www.linear.com/LTC2312-12 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Reference Input/Output Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Applications Information Package Description Revision History Typical Application Related Parts
block DiagraM
2.2µF 2.2µF ANALOG SUPPLY I/O INTERFACE SUPPLY 3V OR 5V RANGE 1.8V TO 5V 1 5 VDD OVDD 2.5V LDO A ANALOG IN INPUT RANGE 4 + THREE-STATE SDO 0V TO VREF SERIAL S/H 12-BIT SAR ADC 6 OUTPUT – PORT REF SCK 2 7 TIMING 2.2µF GND 1.024V CONV 2×/4× LOGIC 3 BANDGAP 8 TS8 PACKAGE 231212 BD ALL CAPACITORS UNLESS NOTED ARE HIGH QUALITY, CERAMIC CHIP TYPE
TiMing DiagraMs
t3 t8 CONV CONV OVDD/2 OVDD/2 Hi-Z VOH Hi-Z SDO MSB SDO VOL
Figure 1. SDO Enabled After CONV
↓
Figure 2. SDO Into Hi-Z After CONV
↑ 231312 TD01 231312 TD02 t7 t4 SCK SCK OVDD/2 OVDD/2 V V OH OH SDO V SDO OL VOL
Figure 3. SDO Data Valid Hold After SCK
↓
Figure 4. SDO Data Valid Access After SCK
↓ 231312 TD03 231212 TD04 231212fa For more information www.linear.com/LTC2312-12 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Reference Input/Output Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Applications Information Package Description Revision History Typical Application Related Parts
