Datasheet LTC2324-16 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | Quad, 16-Bit, 2Msps/Ch Simultaneous Sampling ADC |
| Pages / Page | 30 / 1 — FEATURES. DESCRIPTION. 2Msps/Ch Throughput Rate. Four Simultaneously … |
| File Format / Size | PDF / 1.5 Mb |
| Document Language | English |
FEATURES. DESCRIPTION. 2Msps/Ch Throughput Rate. Four Simultaneously Sampling Channels. Guaranteed 16-Bit, No Missing Codes
Model Line for this Datasheet
Text Version of Document
LTC2324-16 Quad, 16-Bit, 2Msps/Ch Simultaneous Sampling ADC
FEATURES DESCRIPTION
n
2Msps/Ch Throughput Rate
The LTC®2324-16 is a low noise, high speed quad 16-bit n
Four Simultaneously Sampling Channels
successive approximation register (SAR) ADC with n
Guaranteed 16-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input
Operating from a single 3.3V or 5V supply, the LTC2324-16
Common Mode Range
has an 8VP-P differential input range, making it ideal for n
82dB SNR (Typ) at fIN = 500kHz
applications which require a wide dynamic range with high n
–90dB THD (Typ) at fIN = 500kHz
common mode rejection. The LTC2324-16 achieves ±2LSB n Guaranteed Operation to 125°C INL typical, no missing codes at 16 bits and 82dB SNR. n Single 3.3V or 5V Supply The LTC2324-16 has an onboard low drift (20ppm/°C max) n Low Drift (20ppm/°C Max) 2.048V or 4.096V 2.048V or 4.096V temperature-compensated reference. Internal Reference The LTC2324-16 also has a high speed SPI-compatible n 1.8V to 2.5V I/O Voltages serial interface that supports CMOS or LVDS. The fast n CMOS or LVDS SPI-Compatible Serial I/O 2Msps per channel throughput with no latency makes the n Power Dissipation 40mW/Ch (Typ) LTC2324-16 ideally suited for a wide variety of high speed n Small 52-Pin (7mm × 8mm) QFN Package applications. The LTC2324-16 dissipates only 40mW per channel and offers nap and sleep modes to reduce the
APPLICATIONS
power consumption to 26μW for further power savings n High Speed Data Acquisition Systems during inactive periods. n Communications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their n Optical Networking respective owners. n Multiphase Motor Control
TYPICAL APPLICATION TRUE DIFFERENTIAL INPUTS
10µF 1µF
NO CONFIGURATION REQUIRED
3.3V OR 5V 1.8V TO 2.5V
32k Point FFT fSMPL = 2Msps, f IN IN = 500kHz IN+, IN–
VDD GND GND O 0 ARBITRARY DIFFERENTIAL VDD SNR = 83.1dB VDD VDD THD = –90.5dB A + CMOS/LVDS IN1 –20 SINAD = 82.8dB A – S/H 16-BIT SDR/DDR IN1 SAR ADC REFBUFEN SFDR = 97.1dB –40 A + 16-BIT SDO1 0V 0V IN2 A – S/H IN2 SAR ADC SDO2 SDO3 –60 LTC2324-16 SDO4 BIPOLAR UNIPOLAR CLKOUT –80 + VDD VDD AIN3 SCK A – S/H 16-BIT IN3 SAR ADC AMPLITUDE (dBFS) –100 CNV SAMPLE A + IN4 CLOCK A – S/H 16-BIT SAR ADC –120 0V 0V IN4 REF REFOUT1 REFOUT2 REFOUT3 REFOUT4 –140 0 0.2 0.4 0.6 0.8 1 FOUR SIMULTANEOUS 1µF 10µF 10µF 10µF 10µF FREQUENCY (MHz) SAMPLING CHANNELS 232416 TA01a 232416 TA01b 232416f For more information www.linear.com/LTC2324-16 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics ADC Timing Characteristics ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts
FEATURES DESCRIPTION
n
2Msps/Ch Throughput Rate
The LTC®2324-16 is a low noise, high speed quad 16-bit n
Four Simultaneously Sampling Channels
successive approximation register (SAR) ADC with n
Guaranteed 16-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input
Operating from a single 3.3V or 5V supply, the LTC2324-16
Common Mode Range
has an 8VP-P differential input range, making it ideal for n
82dB SNR (Typ) at fIN = 500kHz
applications which require a wide dynamic range with high n
–90dB THD (Typ) at fIN = 500kHz
common mode rejection. The LTC2324-16 achieves ±2LSB n Guaranteed Operation to 125°C INL typical, no missing codes at 16 bits and 82dB SNR. n Single 3.3V or 5V Supply The LTC2324-16 has an onboard low drift (20ppm/°C max) n Low Drift (20ppm/°C Max) 2.048V or 4.096V 2.048V or 4.096V temperature-compensated reference. Internal Reference The LTC2324-16 also has a high speed SPI-compatible n 1.8V to 2.5V I/O Voltages serial interface that supports CMOS or LVDS. The fast n CMOS or LVDS SPI-Compatible Serial I/O 2Msps per channel throughput with no latency makes the n Power Dissipation 40mW/Ch (Typ) LTC2324-16 ideally suited for a wide variety of high speed n Small 52-Pin (7mm × 8mm) QFN Package applications. The LTC2324-16 dissipates only 40mW per channel and offers nap and sleep modes to reduce the
APPLICATIONS
power consumption to 26μW for further power savings n High Speed Data Acquisition Systems during inactive periods. n Communications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their n Optical Networking respective owners. n Multiphase Motor Control
TYPICAL APPLICATION TRUE DIFFERENTIAL INPUTS
10µF 1µF
NO CONFIGURATION REQUIRED
3.3V OR 5V 1.8V TO 2.5V
32k Point FFT fSMPL = 2Msps, f IN IN = 500kHz IN+, IN–
VDD GND GND O 0 ARBITRARY DIFFERENTIAL VDD SNR = 83.1dB VDD VDD THD = –90.5dB A + CMOS/LVDS IN1 –20 SINAD = 82.8dB A – S/H 16-BIT SDR/DDR IN1 SAR ADC REFBUFEN SFDR = 97.1dB –40 A + 16-BIT SDO1 0V 0V IN2 A – S/H IN2 SAR ADC SDO2 SDO3 –60 LTC2324-16 SDO4 BIPOLAR UNIPOLAR CLKOUT –80 + VDD VDD AIN3 SCK A – S/H 16-BIT IN3 SAR ADC AMPLITUDE (dBFS) –100 CNV SAMPLE A + IN4 CLOCK A – S/H 16-BIT SAR ADC –120 0V 0V IN4 REF REFOUT1 REFOUT2 REFOUT3 REFOUT4 –140 0 0.2 0.4 0.6 0.8 1 FOUR SIMULTANEOUS 1µF 10µF 10µF 10µF 10µF FREQUENCY (MHz) SAMPLING CHANNELS 232416 TA01a 232416 TA01b 232416f For more information www.linear.com/LTC2324-16 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics ADC Timing Characteristics ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts
