Datasheet LTC2341-18 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | Dual, 18-Bit, 666ksps/ch Differential SoftSpan ADC with Wide Input Common Mode Range |
| Pages / Page | 38 / 1 — FeaTures. DescripTion. 666ksps per Channel Throughput. Two Simultaneous … |
| File Format / Size | PDF / 2.0 Mb |
| Document Language | English |
FeaTures. DescripTion. 666ksps per Channel Throughput. Two Simultaneous Sampling Channels. ±4LSB INL (Maximum)
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LTC2341-18 Dual, 18-Bit, 666ksps/ch Differential SoftSpan ADC with Wide Input Common Mode Range
FeaTures DescripTion
n
666ksps per Channel Throughput
The LTC®2341-18 is an 18-bit, low noise 2-channel simul- n
Two Simultaneous Sampling Channels
taneous sampling successive approximation register (SAR) n
±4LSB INL (Maximum)
ADC with differential, wide common mode range inputs. n
Guaranteed 18-Bit, No Missing Codes
Operating from a 5V supply and using the internal reference n
Differential, Wide Common Mode Range Inputs
and buffer, both channels of this SoftSpanTM ADC can be n
Per-Channel SoftSpan Input Ranges:
independently configured on a conversion-by-conversion
±4.096V, 0V to 4.096V, ±2.048V, 0V to 2.048V
basis to accept ±4.096V, 0V to 4.096V, ±2.048V, or 0V
±5V, 0V to 5V, ±2.5V, 0V to 2.5V
to 2.048V signals. One channel may also be disabled to n
95dB Single-Conversion SNR (Typical)
increase throughput on the other channel. n
−114dB THD (Typical) at fIN = 2kHz
The wide input common mode range and 105dB CMRR of n
105dB CMRR (Typical) at fIN = 200Hz
the LTC2341-18 analog inputs allow the ADC to directly n
Rail-to-Rail Input Overdrive Tolerance
digitize a variety of signals, simplifying signal chain de- n Guaranteed Operation to 125°C sign. This input signal flexibility, combined with ±4LSB n Integrated Reference and Buffer (4.096V) INL, no missing codes at 18 bits, and 95dB SNR, makes n SPI CMOS (1.8V to 5V) and LVDS Serial I/O the LTC2341-18 an ideal choice for many applications n Internal Conversion Clock, No Cycle Latency requiring wide dynamic range. n 74mW Power Dissipation (Typical) n The LTC2341-18 supports pin-selectable SPI CMOS (1.8V 32-Lead (5mm × 5mm) QFN Package to 5V) and LVDS serial interfaces. Either one or two lanes of data output may be employed in CMOS mode, allowing
applicaTions
the user to optimize bus width and throughput. L n , LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Programmable Logic Controllers SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property n of their respective owners. Protected by U.S. Patents, including 7705765, 7961132, 8319673, Industrial Process Control 9197235. n Medical Imaging n High Speed Data Acquisition
Typical applicaTion
5V 1.8V TO 5V
Integral Nonlinearity vs
0.1µF 2.2µF 0.1µF
Output Code and Channel
CMOS OR LVDS 2.0 FULLY I/O INTERFACE ±4.096V RANGE ARBITRARY DIFFERENTIAL 1.5 FULLY DIFFERENTIAL DRIVE (IN– = –IN+) VDD VDDLBYP OVDD LVDS/CMOS 5V 5V ALL CHANNELS PD 1.0 IN0+ S/H LTC2341-18 IN0– 0.5 0V 0V SDO0 SDO1 0 18-BIT MUX SCKO BIPOLAR UNIPOLAR SAR ADC SCKI –0.5 5V 5V SDI INL ERROR (LSB) CS IN1+ –1.0 S/H BUSY IN1– SAMPLE 0V 0V CNV CLOCK –1.5 REFBUF REFIN GND 234118 TA01a DIFFERENTIAL INPUTS IN+/IN– WITH –2.0 TWO SIMULTANEOUS 47µF 0.1µF –131072 –65536 0 65536 131072 WIDE INPUT COMMON MODE RANGE SAMPLING CHANNELS OUTPUT CODE 234118 TA01b 234118f For more information www.linear.com/LTC2341-18 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics ADC Timing Characteristics ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Typical Application Related Parts
FeaTures DescripTion
n
666ksps per Channel Throughput
The LTC®2341-18 is an 18-bit, low noise 2-channel simul- n
Two Simultaneous Sampling Channels
taneous sampling successive approximation register (SAR) n
±4LSB INL (Maximum)
ADC with differential, wide common mode range inputs. n
Guaranteed 18-Bit, No Missing Codes
Operating from a 5V supply and using the internal reference n
Differential, Wide Common Mode Range Inputs
and buffer, both channels of this SoftSpanTM ADC can be n
Per-Channel SoftSpan Input Ranges:
independently configured on a conversion-by-conversion
±4.096V, 0V to 4.096V, ±2.048V, 0V to 2.048V
basis to accept ±4.096V, 0V to 4.096V, ±2.048V, or 0V
±5V, 0V to 5V, ±2.5V, 0V to 2.5V
to 2.048V signals. One channel may also be disabled to n
95dB Single-Conversion SNR (Typical)
increase throughput on the other channel. n
−114dB THD (Typical) at fIN = 2kHz
The wide input common mode range and 105dB CMRR of n
105dB CMRR (Typical) at fIN = 200Hz
the LTC2341-18 analog inputs allow the ADC to directly n
Rail-to-Rail Input Overdrive Tolerance
digitize a variety of signals, simplifying signal chain de- n Guaranteed Operation to 125°C sign. This input signal flexibility, combined with ±4LSB n Integrated Reference and Buffer (4.096V) INL, no missing codes at 18 bits, and 95dB SNR, makes n SPI CMOS (1.8V to 5V) and LVDS Serial I/O the LTC2341-18 an ideal choice for many applications n Internal Conversion Clock, No Cycle Latency requiring wide dynamic range. n 74mW Power Dissipation (Typical) n The LTC2341-18 supports pin-selectable SPI CMOS (1.8V 32-Lead (5mm × 5mm) QFN Package to 5V) and LVDS serial interfaces. Either one or two lanes of data output may be employed in CMOS mode, allowing
applicaTions
the user to optimize bus width and throughput. L n , LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Programmable Logic Controllers SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property n of their respective owners. Protected by U.S. Patents, including 7705765, 7961132, 8319673, Industrial Process Control 9197235. n Medical Imaging n High Speed Data Acquisition
Typical applicaTion
5V 1.8V TO 5V
Integral Nonlinearity vs
0.1µF 2.2µF 0.1µF
Output Code and Channel
CMOS OR LVDS 2.0 FULLY I/O INTERFACE ±4.096V RANGE ARBITRARY DIFFERENTIAL 1.5 FULLY DIFFERENTIAL DRIVE (IN– = –IN+) VDD VDDLBYP OVDD LVDS/CMOS 5V 5V ALL CHANNELS PD 1.0 IN0+ S/H LTC2341-18 IN0– 0.5 0V 0V SDO0 SDO1 0 18-BIT MUX SCKO BIPOLAR UNIPOLAR SAR ADC SCKI –0.5 5V 5V SDI INL ERROR (LSB) CS IN1+ –1.0 S/H BUSY IN1– SAMPLE 0V 0V CNV CLOCK –1.5 REFBUF REFIN GND 234118 TA01a DIFFERENTIAL INPUTS IN+/IN– WITH –2.0 TWO SIMULTANEOUS 47µF 0.1µF –131072 –65536 0 65536 131072 WIDE INPUT COMMON MODE RANGE SAMPLING CHANNELS OUTPUT CODE 234118 TA01b 234118f For more information www.linear.com/LTC2341-18 1 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Reference Buffer Characteristics Digital Inputs and Digital Outputs Power Requirements ADC Timing Characteristics ADC Timing Characteristics ADC Timing Characteristics Typical Performance Characteristics Pin Functions Configuration Tables Functional Block Diagram Timing Diagram Applications Information Board Layout Package Description Typical Application Related Parts
