Datasheet LTC2444, LTC2445, LTC2448, LTC2449 (Analog Devices) - 5

LTC2444/LTC2445/ LTC2448/LTC2449
TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range l 0.1 12 MHz tHEO External Oscillator High Period l 25 10000 ns tLEO External Oscillator Low Period l 25 10000 ns tCONV Conversion Time OSR = 256 (SDI = 0) l 0.99 1.13 1.33 ms OSR = 32768 (SDI = 1) l 126 145 170 ms External Oscillator, 1X Mode 40 • OSR +178 l ms (Notes 10, 13) fEOSC (kHz) f ISCK Internal SCK Frequency Internal Oscillator (Note 9) l 0.8 0.9 1 MHz External Oscillator (Notes 9, 10) fEOSC/10 Hz DISCK Internal SCK Duty Cycle (Note 9) l 45 55 % fESCK External SCK Frequency Range (Note 8) l 20 MHz tLESCK External SCK Low Period (Note 8) l 25 ns tHESCK External SCK High Period (Note 8) l 25 ns tDOUT_ISCK Internal SCK 32-Bit Data Output Time Internal Oscillator (Notes 9, 11) l 41.6 35.3 30.9 µs External Oscillator (Notes 9, 10) l 320/fEOSC s tDOUT_ESCK External SCK 32-Bit Data Output Time (Note 8) l 32/fEOSC s t1 CS ↓ to SDO Low Z (Note 12) l 0 25 ns t2 CS ↑ to SDO High Z (Note 12) l 0 25 ns t3 CS ↓ to SCK ↓ (Note 9) 5 µs t4 CS ↓ to SCK ↑ (Notes 8, 12) l 25 ns tKQMAX SCK ↓ to SDO Valid l 25 ns tKQMIN SDO Hold After SCK ↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS ↓ l 50 ns t6 SCK Hold After CS ↓ l 50 ns t7 SDI Set-Up Before SCK ↑ (Note 5) l 10 ns t8 SDI Hold After SCK ↑ (Note 5) l 10 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 7:
The converter uses the internal oscillator. may cause permanent damage to the device. Exposure to any Absolute
Note 8:
The converter is in external SCK mode of operation such that the Maximum Rating condition for extended periods may affect device SCK pin is used as a digital input. The frequency of the clock signal driving reliability and lifetime. SCK during the data output is fESCK and is expressed in Hz.
Note 2:
All voltage values are with respect to GND.
Note 9:
The converter is in internal SCK mode of operation such that the
Note 3:
VCC = 4.5V to 5.5V unless otherwise specified. SCK pin is used as a digital output. In this mode of operation, the SCK pin VREF = REF+ – REF–, VREFCM = (REF+ + REF–)/2; has a total equivalent load capacitance of CLOAD = 20pF. VIN = IN+ – IN–, VINCM = (IN+ + IN–)/2.
Note 10:
The external oscillator is connected to the FO pin. The external
Note 4:
FO pin tied to GND or to external conversion clock source with oscillator frequency, fEOSC, is expressed in Hz. fEOSC = 10MHz unless otherwise specified.
Note 11:
The converter uses the internal oscillator. FO = 0V.
Note 5:
Guaranteed by design, not subject to test.
Note 12:
Guaranteed by design and test correlation.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
Note 13:
There is an internal reset that adds an additional 5 to 15 fO cycles straight line passing through the actual endpoints of the transfer curve. to the conversion time. The deviation is measured from the center of the quantization band. 2444589fc For more information www.linear.com/LTC2444 5 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Analog Input and Reference Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Pin Functions Functional Block Diagram Test Circuit Applications Information Package Description Revision History Typical Application Related Parts