Datasheet LTC2488 (Analog Devices) - 5

LTC2488
DIGITAL INPUTS AND DIGITAL OUTPUTS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fEOSC External Oscillator Frequency Range (Note 16) l 10 1000 kHz tHEO External Oscillator High Period l 0.125 100 µs tLEO External Oscillator Low Period l 0.125 100 µs t l CONV Conversion Time Simultaneous 50Hz/60Hz 144.1 146.9 149.9 ms External Oscillator 41036/fEOSC (in kHz) ms fISCK Internal SCK Frequency Internal Oscillator (Notes 10, 17) 38.4 kHz External Oscillator (Notes 10, 11, 15) fEOSC/8 kHz DISCK Internal SCK Duty Cycle (Notes 10, 17) l 45 55 % fESCK External SCK Frequency Range (Notes 10, 11, 15) l 4000 kHz tLESCK External SCK Low Period (Notes 10, 11, 15) l 125 ns tHESCK External SCK High Period (Notes 10, 11, 15) l 125 ns t l DOUT_ISCK Internal SCK 24-Bit Data Output Time Internal Oscillator (Notes 10, 17) 0.61 0.625 0.64 ms External Oscillator (Notes 10, 11, 15) 192/fEOSC (in kHz) ms tDOUT_ESCK External SCK 24-Bit Data Output Time 24/fESCK (in kHz) ms t1 CS↓ to SDO Low l 0 200 ns t2 CS↑ to SDO High Z l 0 200 ns t3 CS↓ to SCK↓ Internal SCK Mode l 0 200 ns t4 CS↓ to SCK↑ External SCK Mode l 50 ns tKQMAX SCK↓ to SDO Valid l 200 ns tKQMIN SDO Hold After SCK↓ (Note 5) l 15 ns t5 SCK Set-Up Before CS↓ l 50 ns t7 SDI Setup Before SCK↑ (Note 5) l 100 ns t8 SDI Hold After SCK↑ (Note 5) l 100 ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings may
Note 10:
The SCK can be configured in external SCK mode or internal SCK cause permanent damage to the device. Exposure to any Absolute Maximum mode. In external SCK mode, the SCK pin is used as a digital input and the Rating condition for extended periods may affect device reliability and lifetime. driving clock is fESCK. In the internal SCK mode, the SCK pin is used as a
Note 2:
All voltage values are with respect to GND. digital output and the output clock signal during the data output is fISCK.
Note 3:
Unless otherwise specified:
Note 11:
The external oscillator is connected to the FO pin. The external V oscillator frequency, f CC = 2.7V to 5.5V EOSC, is expressed in kHz. V
Note 12:
The converter uses its internal oscillator. REFCM = VREF/2, FS = 0.5VREF V
Note 13:
The output noise includes the contribution of the internal IN = IN+ – IN–, VIN(CM) = (IN+ – IN–)/2, where IN+ and IN– are the selected input channels. calibration operations. VREF ≤ VCC.
Note 4:
Use internal conversion clock or external conversion clock source
Note 14:
Guaranteed by design and test correlation. with f
Note 15:
The converter is in external SCK mode of operation such that the EOSC = 307.2kHz unless other wise specified.
Note 5:
Guaranteed by design, not subject to test. SCK pin is used as a digital input. The frequency of the clock signal driving SCK during the data output is f
Note 6:
Integral nonlinearity is defined as the deviation of a code from a ESCK and is expressed in Hz. straight line passing through the actual endpoints of the transfer curve.
Note 16:
Refer to Applications Information section for performance vs The deviation is measured from the center of the quantization band. data rate graphs.
Note 7:
f
Note 17:
The converter in internal SCK mode of operation such that the EOSC = 256kHz ±2% (external oscillator). SCK pin is used as a digital output.
Note 8:
fEOSC = 307.2kHz ±2% (external oscillator).
Note 18:
For V
Note 9:
Simultaneous 50Hz/60Hz (internal oscillator) or f CC < 3V, VIH is 2.5V for pin fO. EOSC = 280kHz ±2% (external oscillator). 2488fb For more information www.linear.com/LTC2488 5