Datasheet LT3028 (Analog Devices) - 10

LT3028
U U U PI FU CTIO S (DFN Package)/(TSSOP Package) GND (Pins 5, 17)/(Pins 1, 5, 8, 9, 16, 17):
Ground. The
SHDN1/SHDN2 (Pins 15/10)/(Pins 14/11):
Shutdown. Exposed Pad must be soldered to PCB ground for opti- The SHDN1/SHDN2 pins are used to put the correspond- mum thermal performance. ing output of the LT3028 regulator into a low power shutdown state. The output will be off when the pin is
ADJ1/ADJ2 (Pins 16/9)/(Pins 15/10):
Adjust Pin. These pulled low. The SHDN1/SHDN2 pins can be driven either are the inputs to the error amplifiers. These pins are by 5V logic or open-collector logic with pull-up resistors. internally clamped to ±7V. They have a bias current of The pull-up resistors are required to supply the pull-up 30nA which flows into the pin (see curve of ADJ1/ADJ2 Pin current of the open-collector gates, normally several mi- Bias Current vs Temperature in the Typical Performance croamperes, and the SHDN1/SHDN2 pin current, typically Characteristics section). The ADJ1 and ADJ2 pin voltage 1µA. If unused, the pin must be connected to VIN. The is 1.22V referenced to ground and the output voltage device will not function if the SHDN1/SHDN2 pins are not range is 1.22V to 20V. connected.
BYP1/BYP2 (Pins 1/8)/(Pins 2/7):
Bypass. The BYP1/BYP2
IN1/IN2 (Pins 13, 14/11, 12)/(Pins 13/12):
Inputs. Power pins are used to bypass the reference of the LT3028 is supplied to the device through the IN pins. A bypass regulator to achieve low noise performance from the capacitor is required on these pins if the device is more regulator. The BYP1/BYP2 pins are clamped internally to than six inches away from the main input filter capacitor. ±0.6V (one VBE) from ground. A small capacitor from the In general, the output impedance of a battery rises with corresponding output to this pin will bypass the reference frequency, so it is advisable to include a bypass capacitor to lower the output voltage noise. A maximum value of in battery-powered circuits. A bypass capacitor in the 0.01µF can be used for reducing output voltage noise to a range of 1µF to 10µF is sufficient. The LT3028 regulator is typical 20µVRMS over a 10Hz to 100kHz bandwidth. If not designed to withstand reverse voltages on the IN pins with used, this pin must be left unconnected. respect to ground and the OUT pins. In the case of a
OUT1/OUT2 (Pins 3, 4/6, 7)/(Pins 3, 4/6):
Output. The reverse input, which can happen if a battery is plugged in outputs supply power to the loads. A minimum output backwards, the device will act as if there is a diode in series capacitor of 1µF is required to prevent oscillations on with its input. There will be no reverse current flow into the Output 2; Output 1 requires a minimum of 3.3µF. Larger regulator and no reverse voltage will appear at the load. output capacitors will be required for applications with The device will protect both itself and the load. large transient loads to limit peak voltage transients. See the Applications Information section for more information on output capacitance and reverse output characteristics.
U U W U APPLICATIO S I FOR ATIO
The LT3028 is a dual 100mA/500mA low dropout regula- independently and a fault condition on one output will not tor with independent inputs, micropower quiescent cur- affect the other output electrically. Output voltage noise rent, and shutdown. The device is capable of supplying can be lowered to 20µVRMS over a 10Hz to 100kHz 100mA from Output 2 at a dropout voltage of 300mV. bandwidth with the addition of a 0.01µF reference bypass Output 1 delivers 500mA at a dropout voltage of 320mV. capacitor. Additionally, the reference bypass capacitor will The two regulators have common GND pins and are improve transient response of the regulator, lowering the thermally coupled, however, the two inputs and outputs of settling time for transient load conditions. The low oper- the LT3028 operate independently. They can be shut down ating quiescent current (30µA per output) drops to less 3028f 10