Datasheet LT1308A, LT1308B (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Single Cell High Current Micropower 600kHz Boost DC/DC Converter |
| Pages / Page | 20 / 9 — APPLICATIONS INFORMATION. LAYOUT HINTS |
| File Format / Size | PDF / 381 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. LAYOUT HINTS
Model Line for this Datasheet
Text Version of Document
LT1308A/LT1308B
APPLICATIONS INFORMATION
Waveforms for a LT1308B 5V to 12V boost converter using
LAYOUT HINTS
a 10μF ceramic output capacitor are pictured in Figures 4 The LT1308A/LT1308B switch current at high speed, man- and 5. In Figure 4, the converter is operating in continuous dating careful attention to layout for proper performance. mode, delivering a load current of approximately 500mA. You will not get advertised performance with careless The top trace is the output. The voltage increases as induc- layout. Figure 6 shows recommended component place- tor current is dumped into the output capacitor during the ment for an SO-8 package boost (step-up) converter. Follow switch off time, and the voltage decreases when the switch this closely in your PC layout. Note the direct path of the is on. Ripple voltage is in this case due to capacitance, switching loops. Input capacitor C1 must be placed close as the ceramic capacitor has little ESR. The middle trace (< 5mm) to the IC package. As little as 10mm of wire or PC is the switch voltage. This voltage alternates between a trace from C V IN to VIN will cause problems such as inability CESAT and VOUT plus the diode drop. The lower trace is to regulate or oscillation. the switch current. At the beginning of the switch cycle, the current is 1.2A. At the end of the switch on time, the The negative terminal of output capacitor C2 should tie current has increased to 2A, at which point the switch turns close to the ground pin(s) of the LT1308A/LT1308B. Doing off and the inductor current fl ows into the output capacitor this reduces dI/dt in the ground copper which keeps high through the diode. Figure 5 depicts converter waveforms frequency spikes to a minimum. The DC/DC converter at a light load. Here the converter operates in discontinu- ground should tie to the PC board ground plane at one place ous mode. The inductor current reaches zero during the only, to avoid introducing dI/dt in the ground plane. switch off time, resulting in some ringing at the switch node. The ring frequency is set by switch capacitance, LBI LBO diode capacitance and inductance. This ringing has little GROUND PLANE energy, and its sinusoidal shape suggests it is free from C1 harmonics. Minimizing the copper area at the switch node + VIN will prevent this from causing interference problems. R1 1 8 VOUT 2 7 100mV/DIV R2 LT1308A L1 LT1308B SHUTDOWN 3 6 VSW 4 5 10V/DIV MULTIPLE + ISW VIAs D1 500mA/DIV C2 GND 1308 F04 500ns/DIV VOUT
Figure 4. 5V to 12V Boost Converter Waveforms in Continuous Mode. 10μF Ceramic Capacitor Used at Output
1308 F04
Figure 6. Recommended Component Placement for SO-8
VOUT 20mV/DIV
Package Boost Converter. Note Direct High Current Paths Using Wide PC Traces. Minimize Trace Area at Pin 1 (VC) and
V
Pin 2 (FB). Use Multiple Vias to Tie Pin 4 Copper to Ground
SW 10V/DIV
Plane. Use Vias at One Location Only to Avoid Introducing Switching Currents into the Ground Plane
ISW 500mA/DIV Figure 7 shows recommended component placement for 1308 F05 500ns/DIV a boost converter using the TSSOP package. Placement
Figure 5. Converter Waveforms in Discontinuous Mode
is similar to the SO-8 package layout. 1308abfb 9
APPLICATIONS INFORMATION
Waveforms for a LT1308B 5V to 12V boost converter using
LAYOUT HINTS
a 10μF ceramic output capacitor are pictured in Figures 4 The LT1308A/LT1308B switch current at high speed, man- and 5. In Figure 4, the converter is operating in continuous dating careful attention to layout for proper performance. mode, delivering a load current of approximately 500mA. You will not get advertised performance with careless The top trace is the output. The voltage increases as induc- layout. Figure 6 shows recommended component place- tor current is dumped into the output capacitor during the ment for an SO-8 package boost (step-up) converter. Follow switch off time, and the voltage decreases when the switch this closely in your PC layout. Note the direct path of the is on. Ripple voltage is in this case due to capacitance, switching loops. Input capacitor C1 must be placed close as the ceramic capacitor has little ESR. The middle trace (< 5mm) to the IC package. As little as 10mm of wire or PC is the switch voltage. This voltage alternates between a trace from C V IN to VIN will cause problems such as inability CESAT and VOUT plus the diode drop. The lower trace is to regulate or oscillation. the switch current. At the beginning of the switch cycle, the current is 1.2A. At the end of the switch on time, the The negative terminal of output capacitor C2 should tie current has increased to 2A, at which point the switch turns close to the ground pin(s) of the LT1308A/LT1308B. Doing off and the inductor current fl ows into the output capacitor this reduces dI/dt in the ground copper which keeps high through the diode. Figure 5 depicts converter waveforms frequency spikes to a minimum. The DC/DC converter at a light load. Here the converter operates in discontinu- ground should tie to the PC board ground plane at one place ous mode. The inductor current reaches zero during the only, to avoid introducing dI/dt in the ground plane. switch off time, resulting in some ringing at the switch node. The ring frequency is set by switch capacitance, LBI LBO diode capacitance and inductance. This ringing has little GROUND PLANE energy, and its sinusoidal shape suggests it is free from C1 harmonics. Minimizing the copper area at the switch node + VIN will prevent this from causing interference problems. R1 1 8 VOUT 2 7 100mV/DIV R2 LT1308A L1 LT1308B SHUTDOWN 3 6 VSW 4 5 10V/DIV MULTIPLE + ISW VIAs D1 500mA/DIV C2 GND 1308 F04 500ns/DIV VOUT
Figure 4. 5V to 12V Boost Converter Waveforms in Continuous Mode. 10μF Ceramic Capacitor Used at Output
1308 F04
Figure 6. Recommended Component Placement for SO-8
VOUT 20mV/DIV
Package Boost Converter. Note Direct High Current Paths Using Wide PC Traces. Minimize Trace Area at Pin 1 (VC) and
V
Pin 2 (FB). Use Multiple Vias to Tie Pin 4 Copper to Ground
SW 10V/DIV
Plane. Use Vias at One Location Only to Avoid Introducing Switching Currents into the Ground Plane
ISW 500mA/DIV Figure 7 shows recommended component placement for 1308 F05 500ns/DIV a boost converter using the TSSOP package. Placement
Figure 5. Converter Waveforms in Discontinuous Mode
is similar to the SO-8 package layout. 1308abfb 9
