Datasheet LT1316 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Micropower DC/DC Converter with Programmable Peak Current Limit |
| Pages / Page | 16 / 5 — PIN FUNCTIONS. LBO (Pin 1):. SW (Pin 5):. VIN (Pin 6):. LBI (Pin 2):. … |
| File Format / Size | PDF / 313 Kb |
| Document Language | English |
PIN FUNCTIONS. LBO (Pin 1):. SW (Pin 5):. VIN (Pin 6):. LBI (Pin 2):. SHDN (Pin 7):. RSET (Pin 3):. FB (Pin 8):. GND (Pin 4):
Model Line for this Datasheet
Text Version of Document
LT1316
U U U PIN FUNCTIONS LBO (Pin 1):
Low-Battery Detector Output. Open collector
SW (Pin 5):
Collector of NPN Power Transistor. Keep can sink up to 500µA. Low-battery detector remains active traces at this pin as short as possible. in shutdown mode.
VIN (Pin 6):
Input Supply. Must be bypassed close to the
LBI (Pin 2):
Low-Battery Detector Input. When voltage at pin. this pin drops below 1.17V, LBO goes low.
SHDN (Pin 7):
Shutdown. Ground this pin to place the part
RSET (Pin 3):
A resistor between RSET and GND programs in shutdown mode (only the low-battery detector remains peak switch current. The resistor value should be between active). Tie to a voltage between 1.4V and 6V to enable the 3k and 150k. Do not float or short to ground. This is a high device. SHDN pin is logic level and need only meet the impedance node. Keep traces at this pin as short as logic specification (1.4V for high, 0.4V for low). possible. Do not put capacitance at this pin.
FB (Pin 8):
Feedback Pin. Reference voltage is 1.23V.
GND (Pin 4):
Ground. Connect directly to ground plane. Connect resistive divider tap here. Minimize trace area at FB. Set VOUT according to: VOUT = 1.23V(1 + R1/R2).
W BLOCK DIAGRA
D1 L1 V V IN OUT C1 R1 LB0 VIN SW 1 6 5 LBI 2 + 1.5V A3 UNDERVOLTAGE LOCKOUT – R3 = 10R4 R4 – FB 8 1.17V + – A1 R2 + A2 VREF 1.23V OSCILLATOR 0.5V + 6.3µs ON DRIVER 2µs OFF A4 Q2 – ×1 Q1 ×200 3 4 7 RSET GND 1316 F01 SHDN R5
Figure 1. LT1316 Block Diagram
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U U U PIN FUNCTIONS LBO (Pin 1):
Low-Battery Detector Output. Open collector
SW (Pin 5):
Collector of NPN Power Transistor. Keep can sink up to 500µA. Low-battery detector remains active traces at this pin as short as possible. in shutdown mode.
VIN (Pin 6):
Input Supply. Must be bypassed close to the
LBI (Pin 2):
Low-Battery Detector Input. When voltage at pin. this pin drops below 1.17V, LBO goes low.
SHDN (Pin 7):
Shutdown. Ground this pin to place the part
RSET (Pin 3):
A resistor between RSET and GND programs in shutdown mode (only the low-battery detector remains peak switch current. The resistor value should be between active). Tie to a voltage between 1.4V and 6V to enable the 3k and 150k. Do not float or short to ground. This is a high device. SHDN pin is logic level and need only meet the impedance node. Keep traces at this pin as short as logic specification (1.4V for high, 0.4V for low). possible. Do not put capacitance at this pin.
FB (Pin 8):
Feedback Pin. Reference voltage is 1.23V.
GND (Pin 4):
Ground. Connect directly to ground plane. Connect resistive divider tap here. Minimize trace area at FB. Set VOUT according to: VOUT = 1.23V(1 + R1/R2).
W BLOCK DIAGRA
D1 L1 V V IN OUT C1 R1 LB0 VIN SW 1 6 5 LBI 2 + 1.5V A3 UNDERVOLTAGE LOCKOUT – R3 = 10R4 R4 – FB 8 1.17V + – A1 R2 + A2 VREF 1.23V OSCILLATOR 0.5V + 6.3µs ON DRIVER 2µs OFF A4 Q2 – ×1 Q1 ×200 3 4 7 RSET GND 1316 F01 SHDN R5
Figure 1. LT1316 Block Diagram
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