Datasheet LT1738 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | Slew Rate Controlled Ultralow Noise DC/DC Controller |
| Pages / Page | 20 / 6 — PI FU CTIO S. Part Supply. PGND (Pin 20):. V5 (Pin 5):. Oscillator. SYNC … |
| File Format / Size | PDF / 260 Kb |
| Document Language | English |
PI FU CTIO S. Part Supply. PGND (Pin 20):. V5 (Pin 5):. Oscillator. SYNC (Pin 6):. GND (Pin 11):. CT (Pin 7):. SHDN (Pin 14):
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Text Version of Document
LT1738
U U U PI FU CTIO S Part Supply PGND (Pin 20):
Power Driver Ground. This ground comes from the MOSFET gate driver. This pin can have several
V5 (Pin 5):
This pin provides a 5V output that can sink or hundred milliamperes of current on it when the external source 10mA for use by external components. V5 source MOSFET is being turned off. current comes from VIN . Sink current goes to GND. VIN must be greater than 6.5V in order for this voltage to be in
Oscillator
regulation. If this pin is used, a small capacitor (<1µF) may be placed on this pin to reduce noise. This pin can be left
SYNC (Pin 6):
The SYNC pin can be used to synchronize open if not used. the part to an external clock. The oscillator frequency should be set close to the external clock frequency.
GND (Pin 11):
Signal Ground. The internal error amplifier, Synchronizing the clock to an external reference is useful negative feedback amplifier, oscillator, slew control cir- for creating more stable positioning of the switcher volt- cuitry, V5 regulator, current sense and the bandgap refer- age and current harmonics. This pin can be left open or ence are referred to this ground. Keep the connection to tied to ground if not used. this pin, the feedback divider and VC compensation net- work free of large ground currents.
CT (Pin 7):
The oscillator capacitor pin is used in conjunc- tion with R
SHDN (Pin 14):
The shutdown pin can disable the switcher. T to set the oscillator frequency. For RT = 16.9k: Grounding this pin will disable all internal circuitry. COSC(nf) = 129/fOSC(kHz) Increasing SHDN voltage will initially turn on the internal
RT (Pin 8):
A resistor to ground sets the charge and bandgap regulator. This provides a precision threshold for discharge currents of the oscillator capacitor. The nomi- the turn on of the rest of the IC. As SHDN increases past nal value is 16.9k. It is possible to adjust this resistance 1.39V the internal LDO regulator turns on, enabling the ±25% to set oscillator frequency more accurately. control and logic circuitry.
Gate Drive
24µA of current is sourced out of the pin above the turn on threshold. This can be used to provide hysteresis for the
GATE (Pin 1):
This pin connects to the gate of an external shutdown function. The hysteresis voltage will be set by N-channel MOSFET. This driver is capable of sinking and the Thevenin resistance of the resistor divider driving this sourcing at least 300mA. pin times the current sourced out. Above approximately The GCL pin sets the upper voltage of the gate drive. The 2.1V the hysteresis current is removed. There is approxi- GATE pin will not be activated until VIN reaches a minimum mately 0.1V of voltage hysteresis on this pin as well. voltage as defined by the GCL pin (gate undervoltage The pin can be tied high (to V lockout). IN for instance).
V
The gate drive output has current limit protection to safe
IN (Pin 17):
Input Supply. All supply current for the part comes from this pin including gate drive and V5 regulator. guard against accidental shorts. Charge current for gate drive can produce current pulses
GCL (Pin 3):
This pin sets the maximum gate voltage to the of hundreds of milliamperes. Bypass this pin with a low GATE pin to the MOSFET gate drive. This pin should be ESR capacitor. either tied to a zener, a voltage source, or VIN. When VIN is below 2.55V the part will go into supply If the pin is tied to a zener or a voltage source, the undervoltage lockout where the gate driver is driven low. maximum gate drive voltage will be approximately VGCL This, along with gate drive undervoltage lockout, prevents – 0.2V. If it is tied to VIN, the maximum gate voltage is unpredictable behavior during power up. approximately VIN – 1.6. 1738fa 6
U U U PI FU CTIO S Part Supply PGND (Pin 20):
Power Driver Ground. This ground comes from the MOSFET gate driver. This pin can have several
V5 (Pin 5):
This pin provides a 5V output that can sink or hundred milliamperes of current on it when the external source 10mA for use by external components. V5 source MOSFET is being turned off. current comes from VIN . Sink current goes to GND. VIN must be greater than 6.5V in order for this voltage to be in
Oscillator
regulation. If this pin is used, a small capacitor (<1µF) may be placed on this pin to reduce noise. This pin can be left
SYNC (Pin 6):
The SYNC pin can be used to synchronize open if not used. the part to an external clock. The oscillator frequency should be set close to the external clock frequency.
GND (Pin 11):
Signal Ground. The internal error amplifier, Synchronizing the clock to an external reference is useful negative feedback amplifier, oscillator, slew control cir- for creating more stable positioning of the switcher volt- cuitry, V5 regulator, current sense and the bandgap refer- age and current harmonics. This pin can be left open or ence are referred to this ground. Keep the connection to tied to ground if not used. this pin, the feedback divider and VC compensation net- work free of large ground currents.
CT (Pin 7):
The oscillator capacitor pin is used in conjunc- tion with R
SHDN (Pin 14):
The shutdown pin can disable the switcher. T to set the oscillator frequency. For RT = 16.9k: Grounding this pin will disable all internal circuitry. COSC(nf) = 129/fOSC(kHz) Increasing SHDN voltage will initially turn on the internal
RT (Pin 8):
A resistor to ground sets the charge and bandgap regulator. This provides a precision threshold for discharge currents of the oscillator capacitor. The nomi- the turn on of the rest of the IC. As SHDN increases past nal value is 16.9k. It is possible to adjust this resistance 1.39V the internal LDO regulator turns on, enabling the ±25% to set oscillator frequency more accurately. control and logic circuitry.
Gate Drive
24µA of current is sourced out of the pin above the turn on threshold. This can be used to provide hysteresis for the
GATE (Pin 1):
This pin connects to the gate of an external shutdown function. The hysteresis voltage will be set by N-channel MOSFET. This driver is capable of sinking and the Thevenin resistance of the resistor divider driving this sourcing at least 300mA. pin times the current sourced out. Above approximately The GCL pin sets the upper voltage of the gate drive. The 2.1V the hysteresis current is removed. There is approxi- GATE pin will not be activated until VIN reaches a minimum mately 0.1V of voltage hysteresis on this pin as well. voltage as defined by the GCL pin (gate undervoltage The pin can be tied high (to V lockout). IN for instance).
V
The gate drive output has current limit protection to safe
IN (Pin 17):
Input Supply. All supply current for the part comes from this pin including gate drive and V5 regulator. guard against accidental shorts. Charge current for gate drive can produce current pulses
GCL (Pin 3):
This pin sets the maximum gate voltage to the of hundreds of milliamperes. Bypass this pin with a low GATE pin to the MOSFET gate drive. This pin should be ESR capacitor. either tied to a zener, a voltage source, or VIN. When VIN is below 2.55V the part will go into supply If the pin is tied to a zener or a voltage source, the undervoltage lockout where the gate driver is driven low. maximum gate drive voltage will be approximately VGCL This, along with gate drive undervoltage lockout, prevents – 0.2V. If it is tied to VIN, the maximum gate voltage is unpredictable behavior during power up. approximately VIN – 1.6. 1738fa 6
