Datasheet LT3740 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Wide Operating Range, Valley Mode, No RSENSE Synchronous Step-Down Controller |
| Pages / Page | 20 / 7 — OPERATION. Start-Up and Shutdown |
| File Format / Size | PDF / 244 Kb |
| Document Language | English |
OPERATION. Start-Up and Shutdown
Model Line for this Datasheet
Text Version of Document
LT3740
OPERATION
The LT3740 is a constant-frequency, valley current mode
Start-Up and Shutdown
controller for DC/DC step-down converters. At the start During normal operation, when the feedback voltage is of each oscillator cycle, the switch logic is set, which above 720mV, the LT3740 operates in forced continuous turns on the bottom MOSFET. After a 500ns blanking mode. When the feedback voltage is below 720mV, either time, the bottom MOSFET current is sensed and added during the start-up or because an external reference is to a stabilizing ramp, and the resulting sum is fed into the applied, a zero current detect comparator is enabled to PWM comparator A1. When this voltage goes below the monitor the on-state bottom MOSFET current. When the voltage at VC pin, the switch logic is reset, which turns off current reaches zero, both the top and bottom MOSFETs the bottom MOSFET, and turns on the top MOSFET. The are turned off, resulting in discontinuous operation. During top MOSFET remains on until the next oscillator cycle. The the time that both top and bottom MOSFETs are off, no bottom MOSFET current can be determined by sensing current signal is fed into the LT3740. Only the stabilizing the voltage between the drain and source of the MOSFET ramp is fed into the PWM comparator to decide the next using the bottom MOSFET on-resistance, or by sensing turn on of the top MOSFET. the voltage drop across a resistor between the source of the bottom MOSFET and ground. The two current sensing The LT3740 uses the SHDN pin to implement one of the pins are SN+ and SN–. The g two different startup schemes. As shown in the block m error amplifi er adjusts the voltage on the V diagram, the V C pin by comparing the feedback signal C pin is clamped to SHDN pin through a V PNP transistor. If the SHDN pin is slowly ramped up, the FB with the reference, which is determined by the lower of the internal 0.8V reference and the voltage at the XREF VC pin will track it up proportionally. As the VC pin voltage pin. If the error amplifi er’s output increases, more current is compared to the current signal at comparator A1, this is delivered to the output; if it decreases, less current is will, in turn, slowly ramp up the switching current. delivered. The tracking capability built into XREF can be used to The LT3740 features an open collector PGOOD signal. When implement another startup scheme. If less than 0.8V is the voltage at FB pin is less than 720mV, the PGOOD output applied to XREF, the LT3740 will use this voltage as the is pulled low by a NPN transistor. The 720mV threshold is reference for regulation. Slowly ramping up the voltage independent of the voltage on XREF pin. at XREF forces the output to increase slowly, which limits the start-up current, as shown in Typical Performance The small internal step-up converter provides a BIAS Characteristics. voltage about 7V higher than the input voltage VIN for the drive of the top MOSFET. This enables the LT3740 to work A sharp SHDN signal is recommended to shut down the from an input voltage as low as 2.2V. The controller starts LT3740. If SHDN slowly ramps down, the VC signal will operation when the BIAS pin is about 7V higher than V be dragged low for a considerable period of time before IN pin. The voltage supply for the bottom MOSFET drive is SHDN reaches its turn-off threshold. During this period provided through the BGDP pin. For V of time, the output voltage could still be in regulation and IN lower than 7V, BGDP should be connected to BIAS to get enough drive the circuit operates in forced continuous mode. A low bias. For V V IN higher than 7V, BGDP can be connected C voltage will result in large bottom MOSFET on-time, directly to V which may cause a reverse inductor current that pumps IN to reduce power loss. the energy from the output to the input. If there is another Grounding the SHDN pin turns both the internal step-up supply at the output or the output has a big capacitor, the converter and the controller off. The SHDN pin can also input voltage could overshoot, and may cause overvoltage be used to implement an optional soft-start function. damage to certain devices. 3740fc 7
OPERATION
The LT3740 is a constant-frequency, valley current mode
Start-Up and Shutdown
controller for DC/DC step-down converters. At the start During normal operation, when the feedback voltage is of each oscillator cycle, the switch logic is set, which above 720mV, the LT3740 operates in forced continuous turns on the bottom MOSFET. After a 500ns blanking mode. When the feedback voltage is below 720mV, either time, the bottom MOSFET current is sensed and added during the start-up or because an external reference is to a stabilizing ramp, and the resulting sum is fed into the applied, a zero current detect comparator is enabled to PWM comparator A1. When this voltage goes below the monitor the on-state bottom MOSFET current. When the voltage at VC pin, the switch logic is reset, which turns off current reaches zero, both the top and bottom MOSFETs the bottom MOSFET, and turns on the top MOSFET. The are turned off, resulting in discontinuous operation. During top MOSFET remains on until the next oscillator cycle. The the time that both top and bottom MOSFETs are off, no bottom MOSFET current can be determined by sensing current signal is fed into the LT3740. Only the stabilizing the voltage between the drain and source of the MOSFET ramp is fed into the PWM comparator to decide the next using the bottom MOSFET on-resistance, or by sensing turn on of the top MOSFET. the voltage drop across a resistor between the source of the bottom MOSFET and ground. The two current sensing The LT3740 uses the SHDN pin to implement one of the pins are SN+ and SN–. The g two different startup schemes. As shown in the block m error amplifi er adjusts the voltage on the V diagram, the V C pin by comparing the feedback signal C pin is clamped to SHDN pin through a V PNP transistor. If the SHDN pin is slowly ramped up, the FB with the reference, which is determined by the lower of the internal 0.8V reference and the voltage at the XREF VC pin will track it up proportionally. As the VC pin voltage pin. If the error amplifi er’s output increases, more current is compared to the current signal at comparator A1, this is delivered to the output; if it decreases, less current is will, in turn, slowly ramp up the switching current. delivered. The tracking capability built into XREF can be used to The LT3740 features an open collector PGOOD signal. When implement another startup scheme. If less than 0.8V is the voltage at FB pin is less than 720mV, the PGOOD output applied to XREF, the LT3740 will use this voltage as the is pulled low by a NPN transistor. The 720mV threshold is reference for regulation. Slowly ramping up the voltage independent of the voltage on XREF pin. at XREF forces the output to increase slowly, which limits the start-up current, as shown in Typical Performance The small internal step-up converter provides a BIAS Characteristics. voltage about 7V higher than the input voltage VIN for the drive of the top MOSFET. This enables the LT3740 to work A sharp SHDN signal is recommended to shut down the from an input voltage as low as 2.2V. The controller starts LT3740. If SHDN slowly ramps down, the VC signal will operation when the BIAS pin is about 7V higher than V be dragged low for a considerable period of time before IN pin. The voltage supply for the bottom MOSFET drive is SHDN reaches its turn-off threshold. During this period provided through the BGDP pin. For V of time, the output voltage could still be in regulation and IN lower than 7V, BGDP should be connected to BIAS to get enough drive the circuit operates in forced continuous mode. A low bias. For V V IN higher than 7V, BGDP can be connected C voltage will result in large bottom MOSFET on-time, directly to V which may cause a reverse inductor current that pumps IN to reduce power loss. the energy from the output to the input. If there is another Grounding the SHDN pin turns both the internal step-up supply at the output or the output has a big capacitor, the converter and the controller off. The SHDN pin can also input voltage could overshoot, and may cause overvoltage be used to implement an optional soft-start function. damage to certain devices. 3740fc 7
