Datasheet LT8494 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | SEPIC/Boost DC/DC Converter with 2A, 70V Switch, and 7μA Quiescent Current |
| Pages / Page | 26 / 7 — PIN FUNCTIONS (QFN/TSSOP) SS (Pin 1/Pin 8):. VIN (Pin 10/Pin 18):. RT … |
| File Format / Size | PDF / 615 Kb |
| Document Language | English |
PIN FUNCTIONS (QFN/TSSOP) SS (Pin 1/Pin 8):. VIN (Pin 10/Pin 18):. RT (Pin 2/Pin 10):. SW (Pin 12/Pin 20):
Model Line for this Datasheet
Text Version of Document
LT8494
PIN FUNCTIONS (QFN/TSSOP) SS (Pin 1/Pin 8):
Soft-Start Pin. Place a soft-start capaci-
VIN (Pin 10/Pin 18):
Supply Input Pin. This pin is typically tor on this pin. Upon start-up, the SS pin will be charged connected to the input of the DC/DC converter. Must be by a (nominally) 256k resistor to about 2.1V. locally bypassed.
RT (Pin 2/Pin 10):
Oscillator Frequency Set Pin. Place a
SW (Pin 12/Pin 20):
Switch Pin. This is the collector of resistor from this pin to ground to set the internal oscil- the internal NPN power switch. Minimize trace area con- lator frequency. Minimize capacitance on this pin. See the nected to this pin to minimize EMI. Applications Information section for more details.
BIAS (Pin 16/Pin 1):
Supply Input Pin. This pin is typi-
GND (Pins 3, 4, 9, 11, 13, 14, 15, Exposed Pad 21/Pins
cally connected to the output of the DC/DC converter in
14, 16, Exposed Pad 21):
Ground. Solder all pins and cases where VIN can be higher than VOUT. Must be locally the exposed pad directly to the local ground plane. The bypassed. exposed pad metal of the package provides both electrical
FB (Pin 17/Pin 2, 3):
Output Voltage Feedback Pin. The contact to ground and good thermal contact to the printed LT8494 regulates the FB pin to 1.202V. Connect a resis- circuit board. tor divider between the output, FB and GND to set the
NC (Pins 5, 7, 8, 18, 19/4, 5, 6, 9, 11, 13, 15, 17, 19):
regulated output voltage. NC pins are not connected to internal circuitry. Some NC
PG (Pin 20/Pin 7):
The PG pin is the open-drain output of pins in the TSSOP package must be left floating to ensure an internal comparator. PG remains low until the FB pin FMEA fault tolerance (see Applications Informations sec- is above 92% of the regulation voltage, and there are no tion for details). fault conditions. See the Applications Information section
SWEN (Pin 6/Pin 12):
Switch Enable Detect Pin. This pin for more details. enables/disables the switching regulator and soft-start. A resistor divider can be connected to SWEN to perform an undervoltage lockout function. 8494fa For more information www.linear.com/LT8494 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Related Parts
PIN FUNCTIONS (QFN/TSSOP) SS (Pin 1/Pin 8):
Soft-Start Pin. Place a soft-start capaci-
VIN (Pin 10/Pin 18):
Supply Input Pin. This pin is typically tor on this pin. Upon start-up, the SS pin will be charged connected to the input of the DC/DC converter. Must be by a (nominally) 256k resistor to about 2.1V. locally bypassed.
RT (Pin 2/Pin 10):
Oscillator Frequency Set Pin. Place a
SW (Pin 12/Pin 20):
Switch Pin. This is the collector of resistor from this pin to ground to set the internal oscil- the internal NPN power switch. Minimize trace area con- lator frequency. Minimize capacitance on this pin. See the nected to this pin to minimize EMI. Applications Information section for more details.
BIAS (Pin 16/Pin 1):
Supply Input Pin. This pin is typi-
GND (Pins 3, 4, 9, 11, 13, 14, 15, Exposed Pad 21/Pins
cally connected to the output of the DC/DC converter in
14, 16, Exposed Pad 21):
Ground. Solder all pins and cases where VIN can be higher than VOUT. Must be locally the exposed pad directly to the local ground plane. The bypassed. exposed pad metal of the package provides both electrical
FB (Pin 17/Pin 2, 3):
Output Voltage Feedback Pin. The contact to ground and good thermal contact to the printed LT8494 regulates the FB pin to 1.202V. Connect a resis- circuit board. tor divider between the output, FB and GND to set the
NC (Pins 5, 7, 8, 18, 19/4, 5, 6, 9, 11, 13, 15, 17, 19):
regulated output voltage. NC pins are not connected to internal circuitry. Some NC
PG (Pin 20/Pin 7):
The PG pin is the open-drain output of pins in the TSSOP package must be left floating to ensure an internal comparator. PG remains low until the FB pin FMEA fault tolerance (see Applications Informations sec- is above 92% of the regulation voltage, and there are no tion for details). fault conditions. See the Applications Information section
SWEN (Pin 6/Pin 12):
Switch Enable Detect Pin. This pin for more details. enables/disables the switching regulator and soft-start. A resistor divider can be connected to SWEN to perform an undervoltage lockout function. 8494fa For more information www.linear.com/LT8494 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Related Parts
