Datasheet LTC1735-1 (Analog Devices) - 7

LTC1735-1
U U U PI FU CTIO S COSC (Pin 1):
External capacitor COSC from this pin to
SGND (Pin 8):
Small-Signal Ground. All small-signal ground sets the operating frequency. components such as COSC, CSS, the feedback divider plus the loop compensation resistors and capacitor(s) should
RUN/SS (Pin 2):
Combination of Soft-Start and Run single-point tie to this pin. This pin should, in turn, connect Control Inputs. A capacitor to ground at this pin sets the to PGND. ramp time to full current output. The time is approximately 1.25s/µF. Forcing this pin below 1.5V causes the device to
EXTVCC (Pin 9):
Input to the Internal Switch Connected to be shut down. In shutdown all functions are disabled. INTVCC. This switch closes and supplies VCC power when- Latchoff overcurrent protection is also invoked via this pin ever EXTVCC is higher than 4.7V. See EXTVCC connection as described in the Applications Information section. in Applications Information section. Do not exceed 7V on this pin and ensure EXTV
I
CC is ≤ VIN.
TH (Pin 3):
Error Amplifier Compensation Point. The current comparator threshold increases with this control
PGND (Pin 10):
Driver Power Ground. This pin connects voltage. Nominal voltage range for this pin is 0V to 2.4V. to the source of the bottom N-channel MOSFET, the anode of the Schottky diode and the (–) terminal of C
PGOOD (Pin 4):
Open-Drain Logic Output and Forced IN. Continuous/Synchronization Input. The PGOOD pin is
BG (Pin 11):
High Current Gate Drive for the Bottom pulled to ground when the voltage on the VOSENSE pin is N-Channel MOSFET. Voltage swing at this pin is from not within ±7.5% of its nominal set point. If power good ground to INTVCC . indication is not needed, this pin can be tied to ground to
INTV
force continuous synchronous operation. Clocking this
CC (Pin 12):
Output of the Internal 5.2V Low Dropout Regulator and EXTV pin with a signal above 1.5V CC Switch. The driver and control P-P synchronizes the internal circuits are powered from this voltage. Decouple to power oscillator to the external clock. Synchronization only ground with a 1µF ceramic capacitor placed directly adja- occurs while the main output is in regulation (PGOOD not cent to the IC together with a minimum of 4.7µF tantalum internally pulled low). When synchronized, Burst Mode or other low ESR capacitor. operation is disabled but cycle skipping is allowed at low load currents. This pin requires a pull-up resistor for
VIN (Pin 13):
Main Supply Pin. This pin must be closely power good indication. Do not connect this pin directly to decoupled to power ground. an external source (or INTVCC). Do not exceed INTVCC on
SW (Pin 14):
Switch Node Connection to Inductor and this pin. Bootstrap Capacitor. Voltage swing at this pin is from a
SENSE – (Pin 5):
The (–) Input to the Current Comparator. Schottky diode (external) voltage drop below ground to V
SENSE + (Pin 6):
The (+) Input to the Current Comparator. IN. Built-in offsets between SENSE + and SENSE – pins in
BOOST (Pin 15):
Supply to Topside Floating Driver. The conjunction with R bootstrap capacitor is returned to this pin. Voltage swing SENSE set the inductor current trip threshold. at this pin is from a diode drop below INTVCC to VIN + INTV
V
CC.
OSENSE (Pin 7):
Receives the feedback voltage from an external resistive divider across the output.
TG (Pin 16):
High Current Gate Drive for Top N-Channel MOSFET. This is the output of a floating driver with a voltage swing equal to INTVCC superimposed on the switch node voltage SW. 7