Datasheet LTC3709 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Fast 2-Phase, No RSENSE , Synchronous DC/DC Controller with Tracking/Sequencing |
| Pages / Page | 24 / 10 — OPERATIO. (Refer to Functional Diagram). MAIN CONTROL LOOP. Output … |
| File Format / Size | PDF / 329 Kb |
| Document Language | English |
OPERATIO. (Refer to Functional Diagram). MAIN CONTROL LOOP. Output Overvoltage Protection. Power Good (PGOOD) Pin
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LTC3709
U OPERATIO (Refer to Functional Diagram) MAIN CONTROL LOOP Output Overvoltage Protection
The LTC3709 is a constant on-time, current mode step- An overvoltage comparator, OV, guards against transient down controller with two channels operating 180 degrees overshoots (>10%) as well as other more serious condi- out of phase. In normal operation, each top MOSFET is tions that may overvoltage the output. In this condition, turned on for a fixed interval determined by its own one- the top MOSFET is turned off and the bottom MOSFET is shot timer OST. When the top MOSFET is turned off, the turned on and held on until the condition is cleared. bottom MOSFET is turned on until the current comparator I
Power Good (PGOOD) Pin
CMP trips, restarting the one-shot timer and repeating the cycle. The trip level of the current comparator is set by the Overvoltage and undervoltage comparators OV and UV ITH voltage, which is the output of error amplifier EA. pull the PGOOD output low if the output feedback voltage Inductor current is determined by sensing the voltage exits a ±10% window around the regulation point. In between the SENSE– and SENSE+ pins using either the addition, the output feedback voltage must be out of this bottom MOSFET on-resistance or a separate sense resis- window for a continuous duration of at least 100µs before tor. At light load, the inductor current can drop to zero and the PGOOD is pulled low. This is to prevent any glitch on become negative. This is detected by current reversal the feedback voltage from creating a false power bad comparator IREV, which then shuts off the bottom MOSFET, signal. The PGOOD will indicate a good power immediately resulting in discontinuous operation. Both switches will when the feedback voltage is in regulation. remain off with the output capacitor supplying the load current until the ITH voltage rises above the zero current
Short-Circuit Detection and Protection
level (0.8V) to initiate another cycle. Discontinuous mode operation is disabled when the FCB pin is tied to ground, After the controller has been started and been given forcing continuous synchronous operation. adequate time to charge the output capacitor, the RUN/SS capacitor is used in a short-circuit time-out circuit. If the The main control loop is shut down by pulling the RUN/SS output voltage falls to less than 67% of its nominal output pin low, turning off both top MOSFET and bottom MOSFET. voltage, the RUN/SS capacitor begins discharging on the Releasing the pin allows an internal 1.2µA current source assumption that the output is in an overcurrent and/or to charge an external soft-start capacitor CSS. When this short-circuit condition. If the condition lasts for a long voltage reaches 1.4V, the LTC3709 turns on and begins enough period, as determined by the size of the RUN/SS operating with a clamp on the noninverting input of the capacitor, the controller will be shut down until the error amplifier. This input is also the reference input of the RUN/SS pin voltage is recycled. This built-in latch off can error amplifier. As the voltage on RUN/SS continues to be overridden by providing a >5µA pull-up at a compli- rise, the voltage on the reference input also rises at the ance of 5V to the RUN/SS pin. This current shortens the same rate, effectively controlling output voltage slew rate. soft-start period but also prevents net discharge of the RUN/SS capacitor during an overcurrent and/or short-
Operating Frequency
circuit condition. The operating frequency is determined implicitly by the top MOSFET on time and the duty cycle required to
DRVCC
maintain regulation. The one-shot timer generates an on- Power for the top and bottom MOSFET drivers and most time that is proportional to the ideal duty cycle, thus of the internal controller circuitry is derived from the holding the frequency approximately constant with changes DRVCC pin. The top MOSFET driver is powered from a in VIN. The nominal frequency can be adjusted with an floating bootstrap capacitor CB. This capacitor is normally external resistor RON. recharged from DRVCC through an external Schottky di- ode DB when the top MOSFET is turned off. 3709fb 10
U OPERATIO (Refer to Functional Diagram) MAIN CONTROL LOOP Output Overvoltage Protection
The LTC3709 is a constant on-time, current mode step- An overvoltage comparator, OV, guards against transient down controller with two channels operating 180 degrees overshoots (>10%) as well as other more serious condi- out of phase. In normal operation, each top MOSFET is tions that may overvoltage the output. In this condition, turned on for a fixed interval determined by its own one- the top MOSFET is turned off and the bottom MOSFET is shot timer OST. When the top MOSFET is turned off, the turned on and held on until the condition is cleared. bottom MOSFET is turned on until the current comparator I
Power Good (PGOOD) Pin
CMP trips, restarting the one-shot timer and repeating the cycle. The trip level of the current comparator is set by the Overvoltage and undervoltage comparators OV and UV ITH voltage, which is the output of error amplifier EA. pull the PGOOD output low if the output feedback voltage Inductor current is determined by sensing the voltage exits a ±10% window around the regulation point. In between the SENSE– and SENSE+ pins using either the addition, the output feedback voltage must be out of this bottom MOSFET on-resistance or a separate sense resis- window for a continuous duration of at least 100µs before tor. At light load, the inductor current can drop to zero and the PGOOD is pulled low. This is to prevent any glitch on become negative. This is detected by current reversal the feedback voltage from creating a false power bad comparator IREV, which then shuts off the bottom MOSFET, signal. The PGOOD will indicate a good power immediately resulting in discontinuous operation. Both switches will when the feedback voltage is in regulation. remain off with the output capacitor supplying the load current until the ITH voltage rises above the zero current
Short-Circuit Detection and Protection
level (0.8V) to initiate another cycle. Discontinuous mode operation is disabled when the FCB pin is tied to ground, After the controller has been started and been given forcing continuous synchronous operation. adequate time to charge the output capacitor, the RUN/SS capacitor is used in a short-circuit time-out circuit. If the The main control loop is shut down by pulling the RUN/SS output voltage falls to less than 67% of its nominal output pin low, turning off both top MOSFET and bottom MOSFET. voltage, the RUN/SS capacitor begins discharging on the Releasing the pin allows an internal 1.2µA current source assumption that the output is in an overcurrent and/or to charge an external soft-start capacitor CSS. When this short-circuit condition. If the condition lasts for a long voltage reaches 1.4V, the LTC3709 turns on and begins enough period, as determined by the size of the RUN/SS operating with a clamp on the noninverting input of the capacitor, the controller will be shut down until the error amplifier. This input is also the reference input of the RUN/SS pin voltage is recycled. This built-in latch off can error amplifier. As the voltage on RUN/SS continues to be overridden by providing a >5µA pull-up at a compli- rise, the voltage on the reference input also rises at the ance of 5V to the RUN/SS pin. This current shortens the same rate, effectively controlling output voltage slew rate. soft-start period but also prevents net discharge of the RUN/SS capacitor during an overcurrent and/or short-
Operating Frequency
circuit condition. The operating frequency is determined implicitly by the top MOSFET on time and the duty cycle required to
DRVCC
maintain regulation. The one-shot timer generates an on- Power for the top and bottom MOSFET drivers and most time that is proportional to the ideal duty cycle, thus of the internal controller circuitry is derived from the holding the frequency approximately constant with changes DRVCC pin. The top MOSFET driver is powered from a in VIN. The nominal frequency can be adjusted with an floating bootstrap capacitor CB. This capacitor is normally external resistor RON. recharged from DRVCC through an external Schottky di- ode DB when the top MOSFET is turned off. 3709fb 10
