Datasheet LTC3822-1 (Analog Devices) - 6

ManufacturerAnalog Devices
DescriptionNo RSENSE , Low Input Voltage, Synchronous Step-Down DC/DC Controller
Pages / Page24 / 6 — TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted. …
File Format / SizePDF / 389 Kb
Document LanguageEnglish

TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted. Pulse Skip Mode Operation. Burst Mode Operation

TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted Pulse Skip Mode Operation Burst Mode Operation

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LTC3822-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C unless otherwise noted. Pulse Skip Mode Operation Burst Mode Operation
VSW VSW 2V/DIV 2V/DIV VOUT VOUT 20mV/DIV 20mV/DIV AC COUPLED AC COUPLED IL IL 2A/DIV 2A/DIV 2µs/DIV 38221 G18 10µs/DIV 38221 G19 FIGURE 10 CIRCUIT FIGURE 10 CIRCUIT VIN = 3.3V VIN = 3.3V VOUT = 1.8V, 100mA VOUT = 1.8V, 100mA
PIN FUNCTIONS (DD/GN) PLLLPF (Pin 1/Pin 2):
This pin serves as the frequency pin using an external resistor divider. The LTC3822-1 select input and PLL lowpass fi lter compensation point. regulates the VFB voltage to the smaller of 0.6V or the When SYNC/MODE has a DC voltage on it, tying this pin voltage on the TRACK/SS pin. An internal 1µA pull-up to GND selects 300kHz operation; tying this pin to VIN current source is connected to this pin. Tying this pin to selects 750kHz operation. Floating this pin selects 550kHz VIN allows VOUT start-up with the internal 1ms soft-start operation. When SYNC/MODE has a clock applied to it, clamp. An external soft-start can be programmed by con- connect an R-C network from this pin to ground. necting a capacitor between this pin and ground. Do not leave this pin fl oating.
SYNC/MODE (Pin 2/Pin 3):
This pin performs two func- tions: 1) external clock synchronization input for phase-
VFB (Pin 4/Pin 6):
Feedback Pin. This pin receives the locked loop and 2) Burst Mode, pulse skipping or forced remotely sensed feedback voltage for the controller from continuous mode select. Applying a clock with frequency an external resistor divider across the output. between 250kHz and 750kHz causes the internal oscilla-
I
tor to phase-lock to the external clock and disables Burst
TH (Pin 5/Pin 7):
Current Threshold and Error Amplifi er Compensation Point. Nominal operating range on this pin Mode operation, but allows pulse skipping at low load is from 0.7V to 2V. The voltage on this pin determines the currents. threshold of the main current comparator. To select Burst Mode operation at light loads, tie this
RUN (Pin 6/Pin 8):
Run Control Input. Forcing this pin pin to VIN. Grounding this pin selects forced continuous below 1.1V shuts down the chip. Driving this pin to V operation, which allows the inductor current to reverse. IN or releasing this pin enables the chip to start-up. Tying this pin to a voltage greater than 0.4V and less than 1.2V selects pulse skipping mode. In these cases, the
IPRG (Pin 7/Pin 10):
Three-State Pin to Select the Maxi- frequency of the internal oscillator is set by the voltage mum Peak Sense Voltage Threshold. This pin selects the on the PLLLPF pin. maximum allowed voltage drop between the VIN and SW pins (i.e., the maximum allowed drop across the external
TRACK/SS (Pin 3/Pin 5):
Tracking Input for the Control- topside MOSFET). Tie to V ler or Optional External Soft-Start Input. This pin allows IN, GND or fl oat to select 200mV, 82mV or 125mV respectively. the start-up of VOUT to “track” the external voltage at this 38221f 6