Datasheet LTC3834 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 30μA IQ Synchronous Step-Down Controller |
| Pages / Page | 30 / 8 — PIN FUNCTIONS (FE/UFD). CLKOUT (Pin 1/Pin 19):. VIN (Pin 11/Pin 9):. … |
| File Format / Size | PDF / 793 Kb |
| Document Language | English |
PIN FUNCTIONS (FE/UFD). CLKOUT (Pin 1/Pin 19):. VIN (Pin 11/Pin 9):. PLLLPF (Pin 2/Pin 20):. SW (Pin 12/Pin 10):
Model Line for this Datasheet
Text Version of Document
LTC3834
PIN FUNCTIONS (FE/UFD) CLKOUT (Pin 1/Pin 19):
Open-Drain Output Clock Signal the Applications Information section. Do not exceed 10V available to daisy-chain other controller ICs for additional on this pin. MOSFET driver stages/phases.
VIN (Pin 11/Pin 9):
Main Supply Pin. A bypass capacitor
PLLLPF (Pin 2/Pin 20):
The phase-locked loop’s lowpass should be tied between this pin and the signal ground pin. filter is tied to this pin when synchronizing to an external
SW (Pin 12/Pin 10):
Switch Node Connections to Inductor. clock. Alternatively, tie this pin to GND, INTVCC or leave Voltage swing at this pin is from a Schottky diode (external) floating to select 250kHz, 530kHz or 400kHz switching voltage drop below ground to V frequency. IN.
TG (Pin 13/Pin 11):
High Current Gate Drive for Top
ITH (Pin 3/Pin 1):
Error Amplifier Outputs and Switching N-Channel MOSFET. These are the outputs of floating Regulator Compensation Points. The current comparator drivers with a voltage swing equal to INTV trip point increases with this control voltage. CC – 0.5V su- perimposed on the switch node voltage SW.
TRACK/SS (Pin 4/Pin 2):
External Tracking and Soft-Start
BOOST (Pin 14/Pin 12):
Bootstrapped Supply to the Input. The LTC3834 regulates the VFB voltage to the smaller Topside Floating Driver. A capacitor is connected between of 0.8V or the voltage on the TRACK/SS pin. A internal 1µA the BOOST and SW pins and a Schottky diode is tied pull-up current source is connected to this pin. A capacitor between the BOOST and INTV to ground at this pin sets the ramp time to final regulated CC pins. Voltage swing at the BOOST pin is from INTV output voltage. Alternatively, a resistor divider on another CC to (VIN + INTVCC). voltage supply connected to this pin allows the LTC3834
RUN (Pin 15/Pin 13):
Digital Run Control Input for output to track the other supply during start-up. Controller. Forcing this pin below 0.7V shuts down all controller functions, reducing the quiescent current that
VFB (Pin 5/Pin 3):
Receives the remotely sensed feedback the LTC3834 draws to approximately 4µA. voltage from an external resistive divider across the output.
SENSE– (Pin 16/Pin 14):
The (–) Input to the Differential
SGND (Pin 6/Pin 4):
Small-Signal Ground. Must be routed Current Comparator. separately from high current grounds to the common (–) terminals of the input capacitor.
SENSE+ (Pin 17/Pin 15):
The (+) Input to the Differential Current Comparator. The I
PGND (Pin 7/Pin 5):
Driver Power Ground. Connects to TH pin voltage and controlled offsets between the SENSE– and SENSE+ pins in conjunc- the source of bottom (synchronous) N-channel MOSFET, tion with R anode of the Schottky rectifier and the (–) terminal of C SENSE set the current trip threshold. IN.
PGOOD (Pin 18/Pin 16):
Open-Drain Logic Output. PGOOD
BG (Pin 8/Pin 6):
High Current Gate Drive for Bottom is pulled to ground when the voltage on the V (Synchronous) N-Channel MOSFET. Voltage swing at this FB pin is not within ±10% of its set point. pin is from ground to INTVCC.
PLLIN/MODE (Pin 19/Pin 17):
External Synchronization
INTVCC (Pin 9/Pin 7):
Output of the Internal Linear Low Input to Phase Detector and Forced Continuous Control Dropout Regulator. The driver and control circuit are Input. When an external clock is applied to this pin, the powered from this voltage source. Must be decoupled phase-locked loop will force the rising TG signal to be to power ground with a minimum of 4.7µF tantalum or synchronized with the rising edge of the external clock. In ceramic capacitor. this case, an R-C filter must be connected to the PLLLPF
EXTVCC (Pin 10/Pin 8):
External Power Input to an Internal pin. When not synchronizing to an external clock, this LDO Connected to INTVCC. This LDO supplies VCC power, input determines how the LTC3834 operates at light loads. bypassing the internal LDO powered from VIN whenever Pulling this pin below 0.7V selects Burst Mode operation. EXTVCC is higher than 4.7V. See EXTVCC Connection in Tying this pin to INTVCC forces continuous inductor current 3834fc 8 For more information www.linear.com/LTC3834 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Package Description Typical Application Related Parts
PIN FUNCTIONS (FE/UFD) CLKOUT (Pin 1/Pin 19):
Open-Drain Output Clock Signal the Applications Information section. Do not exceed 10V available to daisy-chain other controller ICs for additional on this pin. MOSFET driver stages/phases.
VIN (Pin 11/Pin 9):
Main Supply Pin. A bypass capacitor
PLLLPF (Pin 2/Pin 20):
The phase-locked loop’s lowpass should be tied between this pin and the signal ground pin. filter is tied to this pin when synchronizing to an external
SW (Pin 12/Pin 10):
Switch Node Connections to Inductor. clock. Alternatively, tie this pin to GND, INTVCC or leave Voltage swing at this pin is from a Schottky diode (external) floating to select 250kHz, 530kHz or 400kHz switching voltage drop below ground to V frequency. IN.
TG (Pin 13/Pin 11):
High Current Gate Drive for Top
ITH (Pin 3/Pin 1):
Error Amplifier Outputs and Switching N-Channel MOSFET. These are the outputs of floating Regulator Compensation Points. The current comparator drivers with a voltage swing equal to INTV trip point increases with this control voltage. CC – 0.5V su- perimposed on the switch node voltage SW.
TRACK/SS (Pin 4/Pin 2):
External Tracking and Soft-Start
BOOST (Pin 14/Pin 12):
Bootstrapped Supply to the Input. The LTC3834 regulates the VFB voltage to the smaller Topside Floating Driver. A capacitor is connected between of 0.8V or the voltage on the TRACK/SS pin. A internal 1µA the BOOST and SW pins and a Schottky diode is tied pull-up current source is connected to this pin. A capacitor between the BOOST and INTV to ground at this pin sets the ramp time to final regulated CC pins. Voltage swing at the BOOST pin is from INTV output voltage. Alternatively, a resistor divider on another CC to (VIN + INTVCC). voltage supply connected to this pin allows the LTC3834
RUN (Pin 15/Pin 13):
Digital Run Control Input for output to track the other supply during start-up. Controller. Forcing this pin below 0.7V shuts down all controller functions, reducing the quiescent current that
VFB (Pin 5/Pin 3):
Receives the remotely sensed feedback the LTC3834 draws to approximately 4µA. voltage from an external resistive divider across the output.
SENSE– (Pin 16/Pin 14):
The (–) Input to the Differential
SGND (Pin 6/Pin 4):
Small-Signal Ground. Must be routed Current Comparator. separately from high current grounds to the common (–) terminals of the input capacitor.
SENSE+ (Pin 17/Pin 15):
The (+) Input to the Differential Current Comparator. The I
PGND (Pin 7/Pin 5):
Driver Power Ground. Connects to TH pin voltage and controlled offsets between the SENSE– and SENSE+ pins in conjunc- the source of bottom (synchronous) N-channel MOSFET, tion with R anode of the Schottky rectifier and the (–) terminal of C SENSE set the current trip threshold. IN.
PGOOD (Pin 18/Pin 16):
Open-Drain Logic Output. PGOOD
BG (Pin 8/Pin 6):
High Current Gate Drive for Bottom is pulled to ground when the voltage on the V (Synchronous) N-Channel MOSFET. Voltage swing at this FB pin is not within ±10% of its set point. pin is from ground to INTVCC.
PLLIN/MODE (Pin 19/Pin 17):
External Synchronization
INTVCC (Pin 9/Pin 7):
Output of the Internal Linear Low Input to Phase Detector and Forced Continuous Control Dropout Regulator. The driver and control circuit are Input. When an external clock is applied to this pin, the powered from this voltage source. Must be decoupled phase-locked loop will force the rising TG signal to be to power ground with a minimum of 4.7µF tantalum or synchronized with the rising edge of the external clock. In ceramic capacitor. this case, an R-C filter must be connected to the PLLLPF
EXTVCC (Pin 10/Pin 8):
External Power Input to an Internal pin. When not synchronizing to an external clock, this LDO Connected to INTVCC. This LDO supplies VCC power, input determines how the LTC3834 operates at light loads. bypassing the internal LDO powered from VIN whenever Pulling this pin below 0.7V selects Burst Mode operation. EXTVCC is higher than 4.7V. See EXTVCC Connection in Tying this pin to INTVCC forces continuous inductor current 3834fc 8 For more information www.linear.com/LTC3834 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Operation Package Description Typical Application Related Parts
