Datasheet LTC3852 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Low Input Voltage, Synchronous Step-Down DC/DC Controller |
| Pages / Page | 32 / 10 — PIN FUNCTIONS. C– (Pin 8):. MODE/PLLIN (Pin 19):. SHDN. (Pin 10):. GND1 … |
| File Format / Size | PDF / 429 Kb |
| Document Language | English |
PIN FUNCTIONS. C– (Pin 8):. MODE/PLLIN (Pin 19):. SHDN. (Pin 10):. GND1 (Pin 11):. IN1 (Pin 12):. FREQ/PLLFLTR (Pin 20):
Model Line for this Datasheet
Text Version of Document
LTC3852
PIN FUNCTIONS C– (Pin 8):
Flying Capacitor Negative Terminal.
MODE/PLLIN (Pin 19):
Forced Continuous Mode, Burst
SHDN
Mode operation or Pulse-Skipping Mode Selection Pin
(Pin 10):
Active Low Shutdown Input. A low on SHDN and External Synchronization Input to Phase Detector disables the charge pump. This pin must not be Pin. Connect this pin to INTV allowed to fl oat. CC to force continuous conduction mode of operation. Connect to GND2 to enable
GND1 (Pin 11):
Charge Pump Ground. The (–) terminals of pulse-skipping mode of operation. To select Burst Mode CIN and CVPUMP should be closely connected to this pin. operation, tie this pin to INTVCC through a resistor no less
V
than 50k, but no greater than 250k. A clock on the pin
IN1 (Pin 12):
Input Supply Voltage to Charge Pump. VIN1 should be bypassed with a 1μF to 4.7μF low ESR ceramic will force the controller into forced continuous mode of capacitor. operation and synchronize the internal oscillator.
V FREQ/PLLFLTR (Pin 20):
The phase-locked loop’s lowpass
PUMP (Pin 13):
Regulated Output Voltage from Charge Pump. For best performance, V fi lter is tied to this pin. Alternatively, a resistor can be PUMP should be bypassed with a low ESR ceramic capacitor providing at least 2.2μF connected between this pin and GND2 to vary the frequency of capacitance as close to the pin as possible. of the internal oscillator.
INTV RUN (Pin 21):
Run Control Input. Forcing the pin below
CC (Pin 14):
Gate Drive Supply. The MOSFET drivers and internal logic are powered from this voltage. Bypass 1.25V shuts down the step-down controller. There is a this pin to GND with a minimum 2.2μF low ESR tantalum 2μA pull-up current on this pin. or ceramic capacitor, CINTVCC.
TRACK/SS (Pin 22):
Output Voltage Tracking and Soft-Start
V
Input. A capacitor to ground at this pin sets the ramp rate
IN2 (Pin 15):
Main Supply Pin for Step-Down Controller. A bypass capacitor should be tied between this pin and for the output voltage. An internal soft-start current of 1μA the GND2 pin. charges this capacitor.
BOOST (Pin 16):
Boosted Floating Driver Supply. The
ITH (Pin 23):
Error Amplifi er Output and Switching (+) terminal of the booststrap capacitor is connected to Regulator Compensation Point. The current comparator this pin. This pin swings from a diode voltage drop below input threshold increases with this control voltage. INTVCC up to VIN1 + INTVCC.
VFB (Pin 24):
Error Amplifi er Feedback Input. This pin
TG (Pin 17):
Top Gate Driver Output. This is the output receives the remotely sensed feedback voltage from an of a fl oating driver with a voltage swing equal to INTV external resistive divider across the output. CC superimposed on the switch node voltage.
GND (Exposed Pad Pin 25):
Ground. Must be soldered to
SW (Pin 18):
Switch Node Connection to the Inductor. Vol- PCB, providing a local ground for the IC. tage swing at this pin is from a diode (external) voltage drop below ground to the buck regulator power stage VIN. 3852f 10
PIN FUNCTIONS C– (Pin 8):
Flying Capacitor Negative Terminal.
MODE/PLLIN (Pin 19):
Forced Continuous Mode, Burst
SHDN
Mode operation or Pulse-Skipping Mode Selection Pin
(Pin 10):
Active Low Shutdown Input. A low on SHDN and External Synchronization Input to Phase Detector disables the charge pump. This pin must not be Pin. Connect this pin to INTV allowed to fl oat. CC to force continuous conduction mode of operation. Connect to GND2 to enable
GND1 (Pin 11):
Charge Pump Ground. The (–) terminals of pulse-skipping mode of operation. To select Burst Mode CIN and CVPUMP should be closely connected to this pin. operation, tie this pin to INTVCC through a resistor no less
V
than 50k, but no greater than 250k. A clock on the pin
IN1 (Pin 12):
Input Supply Voltage to Charge Pump. VIN1 should be bypassed with a 1μF to 4.7μF low ESR ceramic will force the controller into forced continuous mode of capacitor. operation and synchronize the internal oscillator.
V FREQ/PLLFLTR (Pin 20):
The phase-locked loop’s lowpass
PUMP (Pin 13):
Regulated Output Voltage from Charge Pump. For best performance, V fi lter is tied to this pin. Alternatively, a resistor can be PUMP should be bypassed with a low ESR ceramic capacitor providing at least 2.2μF connected between this pin and GND2 to vary the frequency of capacitance as close to the pin as possible. of the internal oscillator.
INTV RUN (Pin 21):
Run Control Input. Forcing the pin below
CC (Pin 14):
Gate Drive Supply. The MOSFET drivers and internal logic are powered from this voltage. Bypass 1.25V shuts down the step-down controller. There is a this pin to GND with a minimum 2.2μF low ESR tantalum 2μA pull-up current on this pin. or ceramic capacitor, CINTVCC.
TRACK/SS (Pin 22):
Output Voltage Tracking and Soft-Start
V
Input. A capacitor to ground at this pin sets the ramp rate
IN2 (Pin 15):
Main Supply Pin for Step-Down Controller. A bypass capacitor should be tied between this pin and for the output voltage. An internal soft-start current of 1μA the GND2 pin. charges this capacitor.
BOOST (Pin 16):
Boosted Floating Driver Supply. The
ITH (Pin 23):
Error Amplifi er Output and Switching (+) terminal of the booststrap capacitor is connected to Regulator Compensation Point. The current comparator this pin. This pin swings from a diode voltage drop below input threshold increases with this control voltage. INTVCC up to VIN1 + INTVCC.
VFB (Pin 24):
Error Amplifi er Feedback Input. This pin
TG (Pin 17):
Top Gate Driver Output. This is the output receives the remotely sensed feedback voltage from an of a fl oating driver with a voltage swing equal to INTV external resistive divider across the output. CC superimposed on the switch node voltage.
GND (Exposed Pad Pin 25):
Ground. Must be soldered to
SW (Pin 18):
Switch Node Connection to the Inductor. Vol- PCB, providing a local ground for the IC. tage swing at this pin is from a diode (external) voltage drop below ground to the buck regulator power stage VIN. 3852f 10
