Datasheet LTC2946 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Wide Range I2C Power, Charge and Energy Monitor |
| Pages / Page | 42 / 5 — ELECTRICAL. CHARACTERISTICS The. denotes the specifications which apply … |
| File Format / Size | PDF / 474 Kb |
| Document Language | English |
ELECTRICAL. CHARACTERISTICS The. denotes the specifications which apply over the full operating
Model Line for this Datasheet
- LTC2946CDE#PBF LTC2946CDE#PBF LTC2946CDE#TRPBF LTC2946CDE#TRPBF LTC2946CDE-1#PBF LTC2946CDE-1#PBF LTC2946CDE-1#TRPBF LTC2946CDE-1#TRPBF LTC2946CMS#PBF LTC2946CMS#PBF LTC2946CMS#TRPBF LTC2946CMS#TRPBF LTC2946CMS-1#PBF LTC2946CMS-1#PBF LTC2946CMS-1#TRPBF LTC2946CMS-1#TRPBF LTC2946HDE#PBF LTC2946HDE#PBF LTC2946HDE#TRPBF LTC2946HDE#TRPBF LTC2946HDE-1#PBF LTC2946HDE-1#PBF LTC2946HDE-1#TRPBF LTC2946HDE-1#TRPBF LTC2946HMS#PBF LTC2946HMS#PBF LTC2946HMS#TRPBF LTC2946HMS#TRPBF LTC2946HMS-1#PBF LTC2946HMS-1#PBF LTC2946HMS-1#TRPBF LTC2946HMS-1#TRPBF LTC2946IDE#PBF LTC2946IDE#PBF LTC2946IDE#TRPBF LTC2946IDE#TRPBF LTC2946IDE-1#PBF LTC2946IDE-1#PBF LTC2946IDE-1#TRPBF LTC2946IDE-1#TRPBF LTC2946IMS#PBF LTC2946IMS#PBF LTC2946IMS#TRPBF LTC2946IMS#TRPBF LTC2946IMS-1#PBF LTC2946IMS-1#PBF LTC2946IMS-1#TRPBF LTC2946IMS-1#TRPBF LTC2946MPMS#PBF LTC2946MPMS#PBF LTC2946MPMS#TRPBF LTC2946MPMS#TRPBF LTC2946MPMS-1#PBF LTC2946MPMS-1#PBF LTC2946MPMS-1#TRPBF LTC2946MPMS-1#TRPBF
Text Version of Document
LTC2946
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD is from 4V to 100V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VSDA,SCL(TH) SDAI, SCL Input Threshold l 1.5 1.8 2.1 V VSDA,SCL(CL) SDAI, SCL Clamp Voltage ISDAI, ISCL = 3mA l 5.9 6.4 6.9 V
I2C Interface Timing
fSCL(MAX) Maximum SCL Clock Frequency l 400 kHz tLOW SCL LOW Period l 0.65 1.3 μs tHIGH SCL HIGH Period l 50 600 ns tBUF(MIN) Bus Free Time Between l 0.12 1.3 μs STOP/START Condition tHD,STA(MIN) Hold Time After (Repeated) START l 140 600 ns Condition tSU,STA(MIN) Repeated START Condition l 30 600 ns Setup Time tSU,STO(MIN) STOP Condition Setup Time l 30 600 ns tHD,DATI(MIN) Data Hold Time Input l –100 0 ns tHD,DATO(MIN) Data Hold Time Output l 300 600 900 ns tSU,DAT(MIN) Data Setup Time l 30 100 ns tSP(MAX) Maximum Suppressed Spike Pulse Width l 50 110 250 ns tRST Stuck Bus Reset Time SCL or SDAI Held Low l 25 33 ms CX SCL, SDAI Input Capacitance (Note 7) 5 10 pF
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
Internal clamps limit the SCL and SDAI pins to a minimum of may cause permanent damage to the device. Exposure to any Absolute 5.9V. Driving these pins to voltages beyond the clamp may damage the Maximum Rating condition for extended periods may affect device part. The pins can be safely tied to higher voltages through resistors that reliability and lifetime. limit the current below 5mA.
Note 2:
All currents into pins are positive. All voltages are referenced to
Note 5:
ΔSENSE is defined as V + – SENSE – VSENSE ground, unless otherwise noted.
Note 6:
TUE = (ACTUAL CODE – IDEAL CODE)/4096 • 100% where IDEAL
Note 3:
An internal shunt regulator limits the INTVCC pin to a minimum of CODE is derived from a straight line passing through Code 0 at 0V and 5.8V. Driving this pin to voltages beyond 5.8V may damage the part. This theoretical code of 4096 at VFS. pin can be safely tied to higher voltages through a resistor that limits the
Note 7:
Guaranteed by design and not subject to test. current below 35mA.
TYPICAL PERFORMANCE CHARACTERISTICS VDD Supply Current INTVCC Supply Current INTVCC Load Regulation
1000 900 5.2 900 NORMAL 800 NORMAL 800 700 5.1 700 600 5.0 26 30 VOLTAGE (V) CC SUPPLY CURRENT (µA) 24 SHUTDOWN SUPPLY CURRENT (µA) 25 SHUTDOWN INTV 4.9 22 20 20 15 4.8 0 20 40 60 80 100 2 3 4 5 6 0 2 4 6 8 10 VDD SUPPLY VOLTAGE (V) INTV LOAD CURRENT (mA) 2946 G01 CC SUPPLY VOLTAGE (V) 2946 G02 2946 G03 2946fa For more information www.linear.com/LTC2946 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD is from 4V to 100V, unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VSDA,SCL(TH) SDAI, SCL Input Threshold l 1.5 1.8 2.1 V VSDA,SCL(CL) SDAI, SCL Clamp Voltage ISDAI, ISCL = 3mA l 5.9 6.4 6.9 V
I2C Interface Timing
fSCL(MAX) Maximum SCL Clock Frequency l 400 kHz tLOW SCL LOW Period l 0.65 1.3 μs tHIGH SCL HIGH Period l 50 600 ns tBUF(MIN) Bus Free Time Between l 0.12 1.3 μs STOP/START Condition tHD,STA(MIN) Hold Time After (Repeated) START l 140 600 ns Condition tSU,STA(MIN) Repeated START Condition l 30 600 ns Setup Time tSU,STO(MIN) STOP Condition Setup Time l 30 600 ns tHD,DATI(MIN) Data Hold Time Input l –100 0 ns tHD,DATO(MIN) Data Hold Time Output l 300 600 900 ns tSU,DAT(MIN) Data Setup Time l 30 100 ns tSP(MAX) Maximum Suppressed Spike Pulse Width l 50 110 250 ns tRST Stuck Bus Reset Time SCL or SDAI Held Low l 25 33 ms CX SCL, SDAI Input Capacitance (Note 7) 5 10 pF
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
Internal clamps limit the SCL and SDAI pins to a minimum of may cause permanent damage to the device. Exposure to any Absolute 5.9V. Driving these pins to voltages beyond the clamp may damage the Maximum Rating condition for extended periods may affect device part. The pins can be safely tied to higher voltages through resistors that reliability and lifetime. limit the current below 5mA.
Note 2:
All currents into pins are positive. All voltages are referenced to
Note 5:
ΔSENSE is defined as V + – SENSE – VSENSE ground, unless otherwise noted.
Note 6:
TUE = (ACTUAL CODE – IDEAL CODE)/4096 • 100% where IDEAL
Note 3:
An internal shunt regulator limits the INTVCC pin to a minimum of CODE is derived from a straight line passing through Code 0 at 0V and 5.8V. Driving this pin to voltages beyond 5.8V may damage the part. This theoretical code of 4096 at VFS. pin can be safely tied to higher voltages through a resistor that limits the
Note 7:
Guaranteed by design and not subject to test. current below 35mA.
TYPICAL PERFORMANCE CHARACTERISTICS VDD Supply Current INTVCC Supply Current INTVCC Load Regulation
1000 900 5.2 900 NORMAL 800 NORMAL 800 700 5.1 700 600 5.0 26 30 VOLTAGE (V) CC SUPPLY CURRENT (µA) 24 SHUTDOWN SUPPLY CURRENT (µA) 25 SHUTDOWN INTV 4.9 22 20 20 15 4.8 0 20 40 60 80 100 2 3 4 5 6 0 2 4 6 8 10 VDD SUPPLY VOLTAGE (V) INTV LOAD CURRENT (mA) 2946 G01 CC SUPPLY VOLTAGE (V) 2946 G02 2946 G03 2946fa For more information www.linear.com/LTC2946 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
