Datasheet LT3476 (Analog Devices) - 6

LT3476
block DiAgrAM
C EXTERNAL COMPONENTS BYP R 2.2µF CFILT SNS (EXT) BUCK MODE 0.1µF 0.1Ω 10µH PVIN 33V CAP LED SW 3, 4, 9, 10 2, 5, 8, 11 LED ARRAY 22-29 + 35V RSET A1 OVERVOLTAGE 2kΩ DETECT – ERROR V AMPLIFIER ADJ 25k 14, 15, 1.25V + 36, 37 THERMAL PWM + A4 Q3 LIMIT – 145°C Q2 – DRIVER PWM 16, 17, R Q Q1 MAIN A2 SWITCH 34, 35 + S R SET1 IDLE MODE PWM 20kΩ COMPARATOR + VC 1, 12, 13, 38 RSW ∑ A3 0.02Ω – VIN VIN 33 RAMP 3V CURRENT SENSE GENERATOR ISRC AMPLIFIER REF 300µA 7 200kHz – to 2MHz LT3476 CHANNEL OSCILLATOR V1 Q4 + NC 1.05V 19, 20, 21 SHUTDOWN 30, 31, 32 RT SHDN 6 18 3476 BD
operAtion
The LT3476 is a constant-frequency, current mode regula- The current regulated in RSNS can be adjusted by chang- tor with an internal power switch. Operation can be best ing the voltage across RSET using the VADJ input pin. The understood by referring to the Block Diagram. At the amplifier A4 regulates current in Q3 to produce a voltage start of each oscillator cycle, the SR latch is set, which across RSET equal to VADJ. This current flowing through turns on the Q1 power switch. A voltage proportional to transistor Q3 also produces a voltage across RSET one- the switch current is added to a stabilizing ramp and the tenth the magnitude of the VADJ input and level shifted to resulting sum is fed into the positive terminal of the PWM the CAP input. The voltage across RSET is limited to 125mV comparator, A2. When this voltage exceeds the level at (typ) by the separate 1.25V input on A4. the negative input of A2, the SR latch is reset, turning off The average current regulated in R the power switch. The level at the negative input of A2 is SNS can also be adjusted for dimming using the PWM pin. When the PWM pin is set by the error amplifier A1, and is simply an amplified low, switching is disabled and the error amplifier is turned version of the difference between the voltage across the off so that it does not drive the VC pin. Also, all internal internal resistor RSET and the voltage across the external loads on the VC pin are disabled so that the charge state current sense resistor RSNS. In this manner, the error of the VC pin will be saved on the external compensation amplifier sets the correct peak switch current level to capacitor. This feature reduces transient recovery time regulate the current through RSNS. If the error amplifier’s because when the PWM input again transitions high, the output increases, more current is delivered to the output; demand current for the switch returns to the value just if it decreases, less current is delivered. before PWM last transitioned low. 3476fb 6 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts