Datasheet AD7616-P (Analog Devices) - 9

AD7616-P Data Sheet Parallel Interface Timing Specifications Table 3. Parameter Min Typ Max Unit Description
t 20 ns CS high pulse width CS_HIGH t 0 ns CS falling edge to RD falling edge setup time RD_SETUP t 0 ns RD rising edge to CS rising edge hold time RD_HOLD t 20 ns RD high pulse width RD_HIGH t 40 ns RD low pulse width RD_LOW t 40 ns Data access time after falling edge of DOUT_SETUP RD t 16 ns DOUT_3STATE CS rising edge to DBx high impedance t 0 ns CS to WR setup time WR_SETUP t 20 ns WR high pulse width WR_HIGH t 40 ns WR low pulse width WR_LOW t 0 ns WR hold time WR_HOLD t 12 ns Configuration data to DIN_SETUP WR setup time t 5 ns Configuration data to DIN_HOLD WR hold time t 20 ns Configuration data settle time, CONF_SETTLE WR rising edge to CONVST rising edge
CONVST BUSY tRD_HIGH tRD_HOLD tCS_HIGH tDOUT_3STATE CS RD DB0 TO DB15 CONV A CONV B tRD_SETUP tRD_LOW
004
tDOUT_SETUP
15695- Figure 4. Parallel Read Timing Diagram
t t WR_SETUP CONF_SETTLE CONVST CS tWR_HIGH tWR_HOLD WR tDIN_HOLD tWR_LOW DB0 TO DB15 WRITE REG 1 WRITE REG 2
005
tDIN_SETUP
15695- Figure 5. Parallel Write Timing Diagram Rev. 0 | Page 8 of 46 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Universal Timing Specifications Parallel Interface Timing Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Channel Selection Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE SHUTDOWN MODE DIGITAL FILTER APPLICATIONS INFORMATION FUNCTIONALITY OVERVIEW POWER SUPPLIES TYPICAL CONNECTIONS DEVICE CONFIGURATION OPERATIONAL MODE INTERNAL/EXTERNAL REFERENCE HARDWARE MODE SOFTWARE MODE RESET FUNCTIONALITY PIN FUNCTION OVERVIEW DIGITAL INTERFACE CHANNEL SELECTION Hardware Mode Software Mode PARALLEL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SEQUENCER HARDWARE MODE SEQUENCER SOFTWARE MODE SEQUENCER BURST SEQUENCER Hardware Mode Burst Software Mode Burst DIAGNOSTICS DIAGNOSTIC CHANNELS INTERFACE SELF TEST CRC REGISTER SUMMARY ADDRESSING REGISTERS CONFIGURATION REGISTER CHANNEL REGISTER INPUT RANGE REGISTERS Input Range Register A1 Input Range Register A2 Input Range Register B1 Input Range Register B2 SEQUENCER STACK REGISTERS Sequencer Stack Register 0 to Sequencer Stack Register 7 Sequencer Stack Register 8 to Sequencer Stack Register 31 STATUS REGISTER OUTLINE DIMENSIONS ORDERING GUIDE