Datasheet ADAS3022 (Analog Devices) - 8

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Data Sheet ADAS3022 TIMING SPECIFICATIONS
VDDH = 15 V ± 5%, VSSH = −15 V ± 5%, AVDD = DVDD = 5 V ± 5%, VIO = 1.8 V to AVDD, internal reference, VREF = 4.096 V, fS = 1 MSPS. All specifications TMIN to TMAX, unless otherwise noted.
Table 3. Parameter Symbol Min Typ Max Unit
Time Between Conversions tCYC Warp Mode,1 CMS = 0 1 1000 µs Normal Mode (Default), CMS = 1 1.1 µs Conversion Time: CNV Rising Edge to Data Available tCONV Warp Mode, CMS = 0 825 ns Normal Mode (Default), CMS = 1 925 1000 ns Auxiliary ADC Input Channel Acquisition Time tACQ 600 ns CNV Pulse Width tCH 10 ns CNV High to Hold Time (Aperture Delay) tAD 2 ns CNV High to Busy Delay tCBD 520 ns Safe Data Access Time During Conversion tDDC 500 ns Quiet Conversion Time (BUSY High) tQUIET Warp Mode, CMS = 0 400 ns Normal Mode (Default), CMS = 1 500 ns Data Access During Quiet Conversion Time tDDCA Warp Mode, CMS = 0 200 ns Normal Mode (Default), CMS = 1 300 ns SCK Period tSCK 15 ns SCK Low Time tSCKL 5 ns SCK High Time tSCKH 5 ns SCK Falling Edge to Data Valid tSDOH 4 ns SCK Falling Edge to Data Valid Delay tSDOD VIO > 4.5 V 12 ns VIO > 3.0 V 18 ns VIO > 2.7 V 24 ns VIO > 2.3 V 25 ns VIO > 1.8 V 37 ns CS/RESET/PD Low to SDO tEN VIO > 4.5 V 15 ns VIO > 3.0 V 16 ns VIO > 2.7 V 18 ns VIO > 2.3 V 23 ns VIO > 1.8 V 28 ns CS/RESET/PD High to SDO High Impedance tDIS 25 ns DIN Valid Setup Time from SCK Rising Edge tDINS 4 ns DIN Valid Hold Time from SCK Rising Edge tDINH 4 ns CNV Rising to CS tCCS 5 ns RESET/PD High Pulse tRH 5 ns 1 Exceeding the maximum time has an effect on the accuracy of the conversion (see the Conversion Modes section).
500µA IOL 70% VIO 30% VIO tDELAY tDELAY TO SDO 1.4V C 2V OR VIO – 0.5V1 2V OR VIO – 0.5V1 L 50pF 0.8V OR 0.5V2 0.8V OR 0.5V2
002 003
500µA I 1 OH 2V IF VIO > 2.5V; VIO – 0.5V IF VIO < 2.5V. 2
10516-
0.8V IF VIO > 2.5V; 0.5V IF VIO < 2.5V.
10516- Figure 2. Load Circuit for Digital Interface Timing Figure 3. Voltage Levels for Timing Rev. C | Page 7 of 40 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview ADAS3022 Operation Transfer Function Typical Application Connection Diagram Analog Inputs Input Structure Programmable Gain Common-Mode Operating Range Fully Differential, Antiphase Signals with a Zero Common Mode Fully Differential, Antiphase Signals with a Nonzero Common Mode Differential, Nonantiphase Signals with a Zero Common Mode Single-Ended Signals with a Nonzero DC Offset (Asymmetrical) Single-Ended Signals with a 0 V DC Offset (Symmetrical) Multiplexer Channel Sequencer Auxiliary Input Channel Driver Amplifier Choice Voltage Reference Output/Input Internal Reference External Reference and Internal Buffer External Reference Reference Decoupling Power Supply Core Supplies High Voltage Supplies Power Dissipation Modes Fully Operational Mode Power-Down Mode Conversion Modes Warp Mode (CMS = 0) Normal Mode (CMS = 1, Default) Digital Interface Conversion Control CNV Rising Edge—Start of a Conversion (SOC) BUSY Falling Edge—End of a Conversion (EOC) Reset and Power-Down (PD) Inputs Serial Data Interface CPHA Sampling on the SCK Falling Edge Sampling on the SCK Rising Edge (Alternate Edge) CFG Readback General Considerations Data Access During Conversion—Maximum Throughput General Timing Configuration Register On Demand Conversion Mode Channel Sequencer Details INx and COM Inputs (MUX = 1, TEMPB = 1) INx and COM Inputs with AUX Inputs (MUX = 0, TEMPB = 1) INx and COM Inputs with Temperature Sensor (MUX = 1, TEMPB = 0) INx and COM Inputs with AUX Inputs and Temperature Sensor (MUX = 0, TEMPB = 0) Sequencer Modes Basic Sequencer Mode (SEQ = 11) Update During Sequence (SEQ = 01) Advanced Sequencer Mode (SEQ = 10) Outline Dimensions Ordering Guide