Datasheet AD7608 (Analog Devices)
Manufacturer | Analog Devices |
Description | 8-Channel DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC |
Pages / Page | 33 / 1 — 8-Channel DAS with 18-Bit, Bipolar,. Simultaneous Sampling ADC. Data … |
Revision | B |
File Format / Size | PDF / 736 Kb |
Document Language | English |
8-Channel DAS with 18-Bit, Bipolar,. Simultaneous Sampling ADC. Data Sheet. AD7608. FEATURES. APPLICATIONS
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8-Channel DAS with 18-Bit, Bipolar, Simultaneous Sampling ADC Data Sheet AD7608 FEATURES APPLICATIONS 8 simultaneously sampled inputs Power line monitoring and protection systems True bipolar analog input ranges: ±10 V, ±5 V Multiphase motor controls Single 5 V analog supply and 2.3 V to 5.25 V VDRIVE Instrumentation and control systems Fully integrated data acquisition solution Multiaxis positioning systems Analog input clamp protection Data acquisition systems (DAS) Input buffer with 1 MΩ analog input impedance Second-order antialiasing analog filter COMPANION PRODUCTS On-chip accurate reference and reference buffer External References: ADR421, ADR431 18-bit ADC with 200 kSPS on all channels Digital Isolators: ADuM1402, ADuM5000, ADuM5402 Oversampling capability with digital filter Voltage Regulator Design Tool: ADIsimPower, Supervisor Flexible parallel/serial interface Parametric Search SPI/QSPI™/MICROWIRE™/DSP compatible Complete list of complements on AD7608 product page Pin compatible solutions from 14-bits to 18-bits Performance Table 1. High Resolution, Bipolar Input, Simultaneous 7 kV ESD rating on analog input channels Sampling DAS Solutions 98 dB SNR, −107 dB THD Single- True Number of Low power: 100 mW Ended Differential Simultaneous Resolution Inputs Inputs Sampling Channels Standby mode: 25 mW
18 Bits AD76081 AD7609 8
64-lead LQFP package
16 Bits AD7606 8 AD7606-6 6 AD7606-4 4 14 Bits AD7607 8
FUNCTIONAL BLOCK DIAGRAM AV AV REGCAP REGCAP REFCAPB REFCAPA CC CC 1MΩ R V1 FB CLAMP T/H V1GND CLAMP SECOND R ORDER LPF 2.5V 2.5V 1MΩ FB LDO LDO 1MΩ RFB V2 REFIN/REFOUT CLAMP T/H V2GND CLAMP SECOND R ORDER LPF 1MΩ FB REF SELECT 2.5V REF 1MΩ R AGND FB V3 CLAMP T/H OS 2 V3GND CLAMP SECOND R ORDER LPF 1MΩ FB OS 1 OS 0 1MΩ RFB V4 CLAMP T/H D V4GND CLAMP SECOND OUTA R ORDER LPF SERIAL 1MΩ FB DOUTB 8:1 1MΩ R MUX PARALLEL/ FB RD/SCLK DIGITAL V5 CLAMP 18-BIT SERIAL T/H SAR FILTER CS INTERFACE V5GND CLAMP SECOND R ORDER LPF 1MΩ FB PAR/SER SEL 1MΩ R V FB DRIVE V6 CLAMP T/H V6GND CLAMP SECOND PARALLEL DB[15:0] R ORDER LPF 1MΩ FB 1MΩ R AD7608 FB V7 CLAMP T/H V7GND CLAMP SECOND R ORDER LPF 1MΩ CLK OSC FB 1MΩ RFB V8 CLAMP BUSY CONTROL T/H INPUTS V8GND CLAMP SECOND FRSTDATA R ORDER LPF 1MΩ
1
FB
00 8- 93
AGND CONVST A CONVST B RESET RANGE
08 Figure 1. 1 Patent pending.
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2011-2012 Analog Devices, Inc. All rights reserved.
Document Outline Features Applications Companion Products Functional Block Diagram Table of Contents Revision History General Description Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Converter Details Analog Input Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter Track-and-Hold Amplifiers ADC Transfer Function Internal/External Reference External Reference Mode Internal Reference Mode Typical Connection Diagram Power-Down Modes Conversion Control Simultaneous Sampling on All Analog Input Channels Simultaneously Sampling Two Sets of Channels Digital Interface Parallel Interface (/SER SEL = 0) Serial Interface (/SER SEL = 1) Reading During Conversion Digital Filter Layout Guidelines Outline Dimensions Ordering Guide