Data SheetAD7607GENERAL DESCRIPTION The AD76071 is a 14-bit, simultaneous sampling, analog-to- clamp protection circuitry can tolerate voltages of up to ±16.5 V. digital data acquisition system (DAS). The part contains analog The AD7607 has 1 MΩ analog input impedance, regardless of input clamp protection; a second-order antialiasing filter; a track- sampling frequency. The single supply operation, on-chip and-hold amplifier; a 14-bit charge redistribution, successive filtering, and high input impedance eliminate the need for approximation analog-to-digital converter (ADC); a flexible driver op amps and external bipolar supplies. The AD7607 digital filter; a 2.5 V reference and reference buffer; and high antialiasing filter has a 3 dB cutoff frequency of 22 kHz and speed serial and parallel interfaces. provides 40 dB antialias rejection when sampling at 200 kSPS. The AD7607 operates from a single 5 V supply and can accom- The flexible digital filter is pin driven and can be used to modate ±10 V and ±5 V true bipolar input signals while sampling simplify external filtering. at throughput rates of up to 200 kSPS for all channels. The input 1 Protected by US Patent Number 8,072,360 B2. Rev. C | Page 3 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter Track-and-Hold Amplifiers ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE External Reference Mode Internal Reference Mode TYPICAL CONNECTION DIAGRAM POWER-DOWN MODES CONVERSION CONTROL Simultaneous Sampling on All Analog Input Channels Simultaneously Sampling Two Sets of Channels DIGITAL INTERFACE PARALLEL INTERFACE (/SER/BYTE SEL = 0) PARALLEL BYTE INTERFACE (/SER/BYTE SEL = 1, DB15 = 1) SERIAL INTERFACE (/SER/BYTE SEL = 1) READING DURING CONVERSION DIGITAL FILTER LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE NOTES