Datasheet AD9629 (Analog Devices)

12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter Data Sheet AD9629 FEATURES FUNCTIONAL BLOCK DIAGRAM 1.8 V analog supply operation AVDD GND SDIO SCLK CSB DRVDD 1.8 V to 3.3 V output supply RBIAS SNR SPI 71.3 dBFS at 9.7 MHz input VCM R OR PROGRAMMING DATA E 69.0 dBFS at 200 MHz input F D11 (MSB) S SFDR VIN+ ADC O BUF VIN– CORE T 95 dBc at 9.7 MHz input CM UP D0 (LSB) 83 dBc at 200 MHz input UT O DCO VREF Low power SENSE 45 mW at 20 MSPS 85 mW at 80 MSPS REF AD9629 SELECT Differential input with 700 MHz bandwidth On-chip voltage reference and sample-and-hold circuit DIVIDE BY MODE 1, 2, 4 CONTROLS 2 V p-p differential analog input
01
DNL = ±0.16 LSB
0 0-
CLK+ CLK– PDWN DFS MODE
54
Serial port control options
08 Figure 1.
Offset binary, gray code, or twos complement data format Integer 1, 2, or 4 input clock divider PRODUCT HIGHLIGHTS Built-in selectable digital test pattern generation
1. The AD9629 operates from a single 1.8 V analog power
Energy-saving power-down modes
supply and features a separate digital output driver supply
Data clock out with programmable clock and data alignment
to accommodate 1.8 V to 3.3 V logic families.
APPLICATIONS
2. The sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is
Communications
designed for low cost, low power, and ease of use.
Diversity radio systems
3. A standard serial port interface (SPI) supports various
Multimode digital receivers
product features and functions, such as data output format-
GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
ting, internal clock divider, power-down, DCO and data
Smart antenna systems
output (D11 to D0) timing and offset adjustments, and
Battery-powered instruments
voltage reference modes.
Hand held scope meters
4. The AD9629 is packaged in a 32-lead RoHS compliant
Portable medical imaging
LFCSP that is pin compatible with the AD9609 10-bit ADC
Ultrasound
and the AD9649 14-bit ADC, enabling a simple migration
Radar/LIDAR
path between 10-bit and 14-bit converters sampling from
PET/SPECT imaging
20 MSPS to 80 MSPS.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS AD9629-80 AD9629-65 AD9629-40 AD9629-20 EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations Single-Ended Input Configuration VOLTAGE REFERENCE Internal Reference Connection External Reference Operation CLOCK INPUT CONSIDERATIONS Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS Digital Output Enable Function (OEB) TIMING Data Clock Output (DCO) BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST BUILT-IN SELF-TEST (BIST) OUTPUT TEST MODES SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI SPI ACCESSIBLE FEATURES MEMORY MAP READING THE MEMORY MAP REGISTER TABLE OPEN LOCATIONS DEFAULT VALUES Logic Levels Transfer Register Map MEMORY MAP REGISTER TABLE MEMORY MAP REGISTER DESCRIPTIONS USR2 (Register 0x101) Bit 3—Enable GCLK Detect Bit 2—Run GCLK Bit 0—Disable SDIO Pull-Down APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations Exposed Paddle Thermal Heat Sink Recommendations VCM RBIAS Reference Decoupling SPI Port Soft Reset OUTLINE DIMENSIONS ORDERING GUIDE