Datasheet AD9239 (Analog Devices) - 10

Data Sheet AD9239 PIN CONFIGURATION AND FUNCTION DESCRIPTION C B DD M C DD DD DD DD DD DD DD DD M B DD IN – C IN + IN + IN – B NC AV VC AV V V AV AV AV NC AV AV AV V V AV VC AV 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 NC 1 54 NC PIN 1 TEMPOUT 2 INDICATOR 53 PGM0 RBIAS 3 52 PGM1 AVDD 4 51 PGM2 NC 5 PIN 0 = EPAD = AGND 50 PGM3 NC 6 49 NC AVDD 7 48 AVDD VCM D 8 AD9239 47 VCM A AVDD 9 46 AVDD TOP VIEW VIN – D 10 45 VIN – A (Not to Scale) VIN + D 11 44 VIN + A AVDD 12 43 AVDD AVDD 13 42 AVDD AVDD 14 41 AVDD AVDD 15 40 CSB CLK– 16 39 SCLK CLK+ 17 38 SDI/SDIO AVDD 18 37 SDO 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 N NC D C B A DD DD ND DD + – D + – C + – B + – A DD ND NC AV AV ESET DW R UT UT UT UT UT UT UT UT P DRG DRV DRV DRG DO DO DO DO DO DO DO DO NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PADDLE MUST BE SOLDERED TO THE GROUND PLANE FOR THE LFCSP PACKAGE. SOLDERING THE EXPOSED PADDLE TO
004
THE CUSTOMER BOARD INCREASES THE RELIABILITY OF THE SOLDER JOINTS, MAXIMIZING THE THERMAL CAPABILITY OF THE PACKAGE.
06980- Figure 3. Pin Configuration
Table 8. Pin Function Descriptions Pin No. Mnemonic Description
0 AGND Analog Ground (Exposed Paddle). 23, 34 DRGND Digital Output Driver Ground. 4, 7, 9, 12, 13, 14, AVDD 1.8 V Analog Supply. 15, 18, 20, 21, 41, 42, 43, 46, 48, 55, 57, 60, 61, 62, 64, 65, 66, 69, 71 24, 33 DRVDD 1.8 V Digital Output Driver Supply. 2 TEMPOUT Output Voltage to Monitor Temperature. 3 RBIAS External Resistor to Set the Internal ADC Core Bias Current. 8 VCM D Common-Mode Output Voltage Reference. 10 VIN − D ADC D Analog Complement. 11 VIN + D ADC D Analog True. 16 CLK− Input Clock Complement. 17 CLK+ Input Clock True. 22 RESET Digital Output Timing Reset. 25 DOUT + D ADC D True Digital Output. 26 DOUT − D ADC D Complement Digital Output. 27 DOUT + C ADC C True Digital Output. 28 DOUT − C ADC C Complement Digital Output. 29 DOUT + B ADC B True Digital Output. 30 DOUT − B ADC B Complement Digital Output. 31 DOUT + A ADC A True Digital Output. 32 DOUT − A ADC A Complement Digital Output. 35 PDWN Power-Down. Rev. E | Page 9 of 40 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagram Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Equivalent Circuits Theory of Operation Analog Input Considerations Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation Digital Start-Up Sequence Minimize Skew and Time Misalignment (Optional) Link Initialization (Required) Digital Outputs and Timing Digital Output Scrambler and Error Code Correction Error Correction Code Scramblers Inverter Balance Example Calculating the Parity Bits for the Hamming Code TEMPOUT Pin RBIAS Pin VCMx Pins RESET Pin PDWN Pin SDO Pin SDI/SDIO Pin SCLK Pin CSB Pin PGMx Pins Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Outline Dimensions Ordering Guide