Datasheet AD7324 (Analog Devices) - 4

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Data Sheet AD7324 SPECIFICATIONS
Unless otherwise noted, VDD = 12 V to 16.5 V, VSS = −12 V to −16.5 V, VCC = 4.75 V to 5.25 V, VDRIVE = 2.7 V to 5.25 V, VREF = 2.5 V to 3.0 V internal/external, fSCLK = 20 MHz, fS = 1 MSPS, TA = TMAX to TMIN; For VCC < 4.75 V, all specifications are typical.
Table 2. B Version Parameter1 Min Typ Max Unit Test Conditions/Comments
DYNAMIC PERFORMANCE FIN = 50 kHz sine wave Signal-to-Noise Ratio (SNR)2 76 dB Differential mode 72.5 dB Single-ended/pseudo differential mode Signal-to-Noise + Distortion 75 dB Differential mode; ±2.5 V and ±5 V ranges (SINAD)2 76 dB Differential mode; 0 V to 10 V and ±10 V ranges 72 dB Single-ended/pseudo differential mode; ±2.5 V and ±5 V ranges 72.5 dB Single-ended/pseudo differential mode; 0 V to +10 V and ±10 V ranges Total Harmonic Distortion (THD)2 −80 dB Differential mode; ±2.5 V and ±5 V ranges −82 dB Differential mode; 0 V to +10 V and ±10 V ranges −77 dB Single-ended/pseudo differential mode; ±2.5 V and ±5 V ranges −80 dB Single-ended/pseudo differential mode; 0 V to +10 V and ±10 V ranges Peak Harmonic or Spurious −80 dB Differential mode; ±2.5 V and ±5 V ranges Noise (SFDR)2 −82 dB Differential mode; 0 V to +10 V and ±10 V ranges −78 dB Single-ended/pseudo differential mode; ±2.5 V and ±5 V ranges −79 dB Single-ended/pseudo differential mode; 0 V to +10 V and ±10 V ranges Intermodulation Distortion (IMD)2 fa = 50 kHz, fb = 30 kHz Second-Order Terms −88 dB Third-Order Terms −90 dB Aperture Delay3 7 ns Aperture Jitter3 50 ps Common-Mode Rejection Ratio −79 dB Up to 100 kHz ripple frequency; see Figure 17 (CMRR)2 Channel-to-Channel Isolation2 −72 dB FIN on unselected channels up to 100 kHz; see Figure 14 Full Power Bandwidth 22 MHz At 3 dB 5 MHz At 0.1 dB DC ACCURACY4 All dc accuracy specifications are typical for 0 V to 10 V mode. Single-ended/pseudo differential mode 1 LSB = FSR/4096, unless otherwise noted. Differential mode 1 LSB = FSR/8192, unless otherwise noted. Resolution 13 Bits No Missing Codes 12-bit Bits Differential mode plus sign (13 bits) 11-bit Bits Single-ended/pseudo differential mode plus sign (12 bits) Integral Nonlinearity2 ±1.1 LSB Differential mode ±1 LSB Single-ended/pseudo differential mode −0.7/+1.2 LSB Single-ended/pseudo differential mode (LSB = FSR/8192) Rev. B | Page 3 of 36 Document Outline Features Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Terminology Theory of Operation Circuit Information Converter Operation Output Coding Transfer Functions Analog Input Structure Track-and-Hold Section Typical Connection Diagram Analog Input Single-Ended Inputs True Differential Mode Pseudo Differential Inputs Driver Amplifier Choice Registers Addressing Registers Control Register Sequence Register Range Register Sequencer Operation Reference VDRIVE Modes of Operation Normal Mode Full Shutdown Mode Autoshutdown Mode Autostandby Mode Power vs. Throughput Rate Serial Interface Microprocessor Interfacing AD7324 to ADSP-21xx AD7324 to ADSP-BF53x Application Hints Layout and Grounding Power Supply Configuration Outline Dimensions Ordering Guide