Datasheet AD7763 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 24-Bit, 625 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers, Serial Interface |
| Pages / Page | 33 / 9 — AD7763. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. E V. … |
| Revision | B |
| File Format / Size | PDF / 652 Kb |
| Document Language | English |
AD7763. Data Sheet. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. E V. DRI. 2 I. CDI. 64 63 62. 60 59 58. 57 56 55 54 53 52 51 50 49. DGND
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AD7763 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS E V ND ND ND V ND ND DRI S CR SO CO DO DI SI DL CP DG V DG 2 I S DG CDI DG F S S DG S F S S 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DGND 1 48 ADR0 MCLKGND PIN 1 2 47 ADR1 MCLK 3 46 ADR2 AV 4 45 SH0 DD2 AGND2 5 44 VDRIVE AV 6 43 DGND DD1 AGND1 7 42 DGND DECAPA 8 AD7763 41 DVDD REFGND TOP VIEW 9 40 SH1 (Not to Scale) V 10 39 SH2 REF+ AGND4 11 38 DRDY AV 12 37 RESET DD4 AGND2 13 36 SYNC AV 14 35 DGND DD2 AV 15 34 AGND1 DD2 AGND2 16 33 AVDD1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 + – B AS A+ A– A– A+ IN IN BI ND2 DD3 DD2 IN IN ND3 V V ND2 ND3 ND3 ND3 R V V UT UT CAP AG O O AV AV V V AG AG AG AG AG DE
005
NOTES 1. CONNECT THE EXPOSED PAD TO AGNDx WITH SIX TO EIGHT VIAS.
05476- Figure 5. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
6, 33 AVDD1 Power Supply for Modulator, 2.5 V. These pins should be decoupled to AGND1 with 100 nF and 10 µF capacitors on each pin. 4, 14, 15, 27 AVDD2 Power Supply, 5 V. These pins should be decoupled to AGND2 with 100 nF capacitors on each of Pin 4, Pin 14, and Pin 15. Pin 27 should be connected to Pin 14 via an 8.2 nH inductor. 24 AVDD3 Power Supply for Differential Amplifier, 3.3 V to 5 V. This pin should be decoupled to AGND3 with a 100 nF capacitor. 12 AVDD4 Power Supply for Reference Buffer, 3.3 V to 5 V. This pin should be decoupled to AGND4 with a 10 nF capacitor in series with a 10 Ω resistor. 7, 34 AGND1 Power Supply Ground for Analog Circuitry Powered by AVDD1. 5, 13, 16, 18, 28 AGND2 Power Supply Ground for Analog Circuitry Powered by AVDD2. 23, 29, 31, 32 AGND3 Power Supply Ground for Analog Circuitry Powered by AVDD3. 11 AGND4 Power Supply Ground for Analog Circuitry Powered by AVDD4. 9 REFGND Reference Ground. Ground connection for the reference voltage. 41 DVDD Power Supply for Digital Circuitry and FIR Filter, 2.5 V. This pin should be decoupled to DGND with a 100 nF capacitor. 44, 63 VDRIVE Logic Power Supply Input, 1.8 V to 2.5 V. The voltage supplied at these pins determines the operating voltage of the logic interface. These pins must be connected together and tied to the same supply. Each pin should also be decoupled to DGND with a 100 nF capacitor. 1, 35, 42, 43, 53, 57, 59, DGND Ground Reference for Digital Circuitry. 62, 64 19 VINA+ Positive Input to Differential Amplifier. 20 VINA− Negative Input to Differential Amplifier. 21 VOUTA− Negative Output from Differential Amplifier. 22 VOUTA+ Positive Output from Differential Amplifier. 25 VIN+ Positive Input to the Modulator. 26 VIN− Negative Input to the Modulator. 10 VREF+ Reference Input. The input range of this pin is determined by the reference buffer supply voltage (AVDD4). See the Reference Voltage Filtering section for more details. Rev. B | Page 8 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7763 Interface Reading Data Using the SPI Interface Synchronization Sharing the Serial Bus Writing to the AD7763 Reading Status and Other Registers Reading Data Using the I2S Interface Clocking the AD7763 Example 1 Example 2 Driving the AD7763 Using the AD7763 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Exposed Paddle Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download Registers Control Register 1—Address 0x001 Default Value 0x001A Control Register 2—Address 0x002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x003 Non Bit-Mapped, Default Value 0x0000 Gain Register—Address 0x004 Non Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x005 Non Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide
AD7763 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS E V ND ND ND V ND ND DRI S CR SO CO DO DI SI DL CP DG V DG 2 I S DG CDI DG F S S DG S F S S 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 DGND 1 48 ADR0 MCLKGND PIN 1 2 47 ADR1 MCLK 3 46 ADR2 AV 4 45 SH0 DD2 AGND2 5 44 VDRIVE AV 6 43 DGND DD1 AGND1 7 42 DGND DECAPA 8 AD7763 41 DVDD REFGND TOP VIEW 9 40 SH1 (Not to Scale) V 10 39 SH2 REF+ AGND4 11 38 DRDY AV 12 37 RESET DD4 AGND2 13 36 SYNC AV 14 35 DGND DD2 AV 15 34 AGND1 DD2 AGND2 16 33 AVDD1 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 + – B AS A+ A– A– A+ IN IN BI ND2 DD3 DD2 IN IN ND3 V V ND2 ND3 ND3 ND3 R V V UT UT CAP AG O O AV AV V V AG AG AG AG AG DE
005
NOTES 1. CONNECT THE EXPOSED PAD TO AGNDx WITH SIX TO EIGHT VIAS.
05476- Figure 5. Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
6, 33 AVDD1 Power Supply for Modulator, 2.5 V. These pins should be decoupled to AGND1 with 100 nF and 10 µF capacitors on each pin. 4, 14, 15, 27 AVDD2 Power Supply, 5 V. These pins should be decoupled to AGND2 with 100 nF capacitors on each of Pin 4, Pin 14, and Pin 15. Pin 27 should be connected to Pin 14 via an 8.2 nH inductor. 24 AVDD3 Power Supply for Differential Amplifier, 3.3 V to 5 V. This pin should be decoupled to AGND3 with a 100 nF capacitor. 12 AVDD4 Power Supply for Reference Buffer, 3.3 V to 5 V. This pin should be decoupled to AGND4 with a 10 nF capacitor in series with a 10 Ω resistor. 7, 34 AGND1 Power Supply Ground for Analog Circuitry Powered by AVDD1. 5, 13, 16, 18, 28 AGND2 Power Supply Ground for Analog Circuitry Powered by AVDD2. 23, 29, 31, 32 AGND3 Power Supply Ground for Analog Circuitry Powered by AVDD3. 11 AGND4 Power Supply Ground for Analog Circuitry Powered by AVDD4. 9 REFGND Reference Ground. Ground connection for the reference voltage. 41 DVDD Power Supply for Digital Circuitry and FIR Filter, 2.5 V. This pin should be decoupled to DGND with a 100 nF capacitor. 44, 63 VDRIVE Logic Power Supply Input, 1.8 V to 2.5 V. The voltage supplied at these pins determines the operating voltage of the logic interface. These pins must be connected together and tied to the same supply. Each pin should also be decoupled to DGND with a 100 nF capacitor. 1, 35, 42, 43, 53, 57, 59, DGND Ground Reference for Digital Circuitry. 62, 64 19 VINA+ Positive Input to Differential Amplifier. 20 VINA− Negative Input to Differential Amplifier. 21 VOUTA− Negative Output from Differential Amplifier. 22 VOUTA+ Positive Output from Differential Amplifier. 25 VIN+ Positive Input to the Modulator. 26 VIN− Negative Input to the Modulator. 10 VREF+ Reference Input. The input range of this pin is determined by the reference buffer supply voltage (AVDD4). See the Reference Voltage Filtering section for more details. Rev. B | Page 8 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7763 Interface Reading Data Using the SPI Interface Synchronization Sharing the Serial Bus Writing to the AD7763 Reading Status and Other Registers Reading Data Using the I2S Interface Clocking the AD7763 Example 1 Example 2 Driving the AD7763 Using the AD7763 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Exposed Paddle Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download Registers Control Register 1—Address 0x001 Default Value 0x001A Control Register 2—Address 0x002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x003 Non Bit-Mapped, Default Value 0x0000 Gain Register—Address 0x004 Non Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x005 Non Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide
