Datasheet AD7933, AD7934 (Analog Devices) - 10

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AD7933/AD7934 Pin No. Mnemonic Description
20 WR Write Input. Active low logic input used in conjunction with CS to write data to the control register. 21 RD Read Input. Active low logic input used in conjunction with CS to access the conversion result. The conversion result is placed on the data bus following the falling edge of RD read while CS is low. 22 CS Chip Select. Active low logic input used in conjunction with RD and WR to read conversion data or write data to the control register. 23 AGND Analog Ground. This is the ground reference point for all analog circuitry on the AD7933/AD7934. All analog input signals and any external reference signal should be referred to this AGND voltage. The AGND and DGND voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. 24 VREFIN/VREFOUT Reference Input/Output. This pin is connected to the internal reference and is the reference source for the ADC. The nominal internal reference voltage is 2.5 V, and this appears at this pin. It is recommended to decouple the VREFIN/VREFOUT pin to AGND with a 470 nF capacitor. This pin can be overdriven by an external reference. The input voltage range for the external reference is 0.1 V to VDD; however, ensure that the analog input range does not exceed VDD + 0.3 V. See the Reference section. 25 to VIN0 to VIN3 Analog Input 0 to Analog Input 3. Four analog input channels that are multiplexed into the on-chip track-and- 28 hold. The analog inputs can be programmed as four single-ended inputs, two fully differential pairs, or two pseudo differential pairs by appropriately setting the MODE bits in the control register (see Table 10). Select the analog input channel to be converted either by writing to Address Bit ADD1 and Address Bit ADD0 in the control register prior to the conversion, or by using the on-chip sequencer. The input range for all input channels can either be 0 V to VREF or 0 V to 2 × VREF, and the coding can be binary or twos complement, depending on the states of the RANGE and CODING bits in the control register. To avoid noise pickup, connect any unused input channels to AGND. Rev. B | Page 10 of 32 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7933 SPECIFICATIONS AD7934 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY CONTROL REGISTER SEQUENCER OPERATION Writing to the Control Register to Program the Sequencer CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT STRUCTURE ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode ANALOG INPUT SELECTION Traditional Multichannel Operation (SEQ0 = SEQ1 = 0) Using the Sequencer: Consecutive Sequence (SEQ0 = 1, SEQ1 = 1) REFERENCE Digital Inputs VDRIVE Input PARALLEL INTERFACE Reading Data from the AD7933/AD7934 Writing Data to the AD7933/AD7934 POWER MODES OF OPERATION Normal Mode (PM1 = PM0 = 0) Autoshutdown (PM1 = 0; PM0 = 1) Autostandby (PM1 = 1; PM0 = 0) Full Shutdown Mode (PM1 = 1; PM0 = 1) POWER vs. THROUGHPUT RATE MICROPROCESSOR INTERFACING AD7933/AD7934 to ADSP-21xx Interface AD7933/AD7934 to ADSP-21065L Interface AD7933/AD7934 to TMS32020, TMS320C25, and TMS320C5x Interface AD7933/AD7934 to 80C186 Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE AD7933/AD7934 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE